1
Liang Ge, Xia Li, Jia Lian Tang, Xiao Feng Tang, Chen Xu: Constraint optimization of sub-net level routing in asic design. International Business Machines Corporation, DeLizio Gilliam PLLC, September 24, 2013: US08543964 (57 worldwide citation)

Functionality can be implemented for optimizing connection constraints in an integrated circuit design. A target timing path associated with a first of a plurality of sub-connections of the integrated circuit is determined. A timing probability value and a route probability value associated with the ...


2
Xia Li, Seung H Kang, Xiaochun Zhu: Magnetic tunnel junction cell including multiple vertical magnetic domains. QUALCOMM Incorporated, Sam Talpalatsky, Nicholas J Pauley, Jonathan Velasco, February 8, 2011: US07885105 (38 worldwide citation)

Magnetic tunnel junction cell including multiple vertical domains. In an embodiment, a magnetic tunnel junction (MTJ) structure is disclosed. The MTJ structure includes an MTJ cell. The MTJ cell includes multiple vertical side walls. Each of the multiple vertical side walls defines a unique vertical ...


3
Balseanu Mihaela, Xia Li Qun, Shek Mei Yee, M Saad Hichem: Step coverage and pattern loading for dielectric films. Applied Materials, Balseanu Mihaela, Xia Li Qun, Shek Mei Yee, M Saad Hichem, PATTERSON B Todd, October 18, 2007: WO/2007/118026 (37 worldwide citation)

Methods of controlling the step coverage and pattern loading of a layer on a substrate are provided. In one aspect, a method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the ...


4
Balseanu Mihaela, Cox Michael S, Xia Li Qun, Shek Mei Yee, Lee Jia, Zubkov Vladimir, Huang Tzu Fang, Wang Rongping, Roflox Isabelita, M Saad Hichem: Method to increase tensile stress of silicon nitride films by using a post pecvd deposition uv cure. Applied Materials, Balseanu Mihaela, Cox Michael S, Xia Li Qun, Shek Mei Yee, Lee Jia, Zubkov Vladimir, Huang Tzu Fang, Wang Rongping, Roflox Isabelita, M Saad Hichem, TOBIN Kent J, November 30, 2006: WO/2006/127463 (35 worldwide citation)

High tensile stress in a deposited layer such as silicon nitride, may be achieved utilizing one or more techniques, employed alone or in combination. High tensile stress may be achieved by forming a silicon-containing layer on a surface by exposing the surface to a silicon-containing precursor gas i ...


5
Moghadam Farhad, Cheung David W, Yieh Ellie, Xia Li Qun, Yau Wai Fan, Lang Chi I, Jeng Shin Puu, Gaillard Frederick, Venkataraman Shankar, Nemani Srinivas D: Formation of fluid silicon layer by reaction of organic silicon compound with hydroxyl forming compound. Applied Materials, May 29, 2001: JP2001-148382 (29 worldwide citation)

PROBLEM TO BE SOLVED: To provide a method and an apparatus for evenly depositing silicon oxide layer having a low permittivity used for a gap filling layer in a sub- micron element, a premetal dielectric layer, an intermetal dielectric layer, shallow trench separating dielectric layer and the like. ...


6
Xia Li, Chock Hing Gan: Method of fabricating T-shaped recessed polysilicon gate transistors. Chartered Semiconductor Manufacturing, George O Saile, Rosemary L S Pike, Stephen G Stenton, October 30, 2001: US06309933 (25 worldwide citation)

A method of fabricating a semiconductor transistor device comprising the following steps. A semiconductor structure is provided having an upper silicon layer, a pad dielectric layer over the upper silicon layer, and a well implant within a well region in the upper silicon layer. A lower SiN layer is ...


7
Nemani Srinivas D, Xia Li Qun, Sugiarto Dian, Yieh Ellie, Xu Ping, Campana Schmitt Francimar, Lee Jia: Method of deposition of silicon carbide film in integrated circuit fabrication. Applied Materials, January 30, 2002: EP1176226-A1 (25 worldwide citation)

A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a dopant in the presence of an electric field. The as-deposited silicon carbide ...


8
Xia Li: Method of forming a magnetic tunnel junction structure. QUALCOMM Incorporated, Nicholas J Pauley, Sam Talpalatsky, Peter M Kamarchik, August 25, 2009: US07579197 (24 worldwide citation)

In a particular illustrative embodiment, a method of forming a magnetic tunnel junction (MTJ) device is disclosed that includes forming a trench in a substrate. The method further includes depositing a magnetic tunnel junction (MTJ) structure within the trench. The MTJ structure includes a bottom el ...


9
Xiaochun Zhu, Xia Li, Wei Chuan Chen, Seung H Kang: Strain induced reduction of switching current in spin-transfer torque switching devices. QUALCOMM Incorporated, Sam Talpalatsky, Nicholas J Pauley, Joseph Agusta, April 22, 2014: US08704320 (20 worldwide citation)

Partial perpendicular magnetic anisotropy (PPMA) type magnetic random access memory cells are constructed using processes and structural configurations that induce a directed static strain/stress on an MTJ to increase the perpendicular magnetic anisotropy. Consequently, reduced switching current of ...


10
Xiaochun Zhu, Shiqun Gu, Xia Li, Seung H Kang: Magnetic tunnel junction device with separate read and write paths. QUALCOMM Incorporated, Semion Talpalatsky, August 23, 2011: US08004881 (17 worldwide citation)

In an embodiment, a device is disclosed that includes a magnetic tunnel junction (MTJ) structure. The device also includes a read path coupled to the MTJ structure and a write path coupled to the MTJ structure. The write path is separate from the read path.