1
Bhuwan Agrawal, Stephen E Bello, Wilm E Donath, San Y Han, Joseph Hutt Jr, Jerome M Kurtzberg, Roger I McMillan, Reini J Norman, Cyril A Price, Ralph W Wilk: Timing driven placement. International Business Machines Corporation, Charles B Lobsenz, Blaney Harper, George E Clark, June 8, 1993: US05218551 (118 worldwide citation)

The invention is a method of designing an integrated circuit in which the steps of designing the circuit are optimized by a formal hierarchy. This method, called Timing Driven Placement, of designing an integrated circuit avoids detailed optimization which consumes enormous computational resources. ...


2
Wilm E Donath, Robert B Hitchcock Sr: Method for determining the characteristics of a logic block graph diagram to provide an indication of path delays between the blocks. International Business Machines Corporation, John J Goodwin, April 21, 1981: US04263651 (69 worldwide citation)

A method is provided which is applied to a logic block diagram, referred to as a block graph, which consists of a plurality of logic blocks interconnected by nets which carry logic signals between the logic blocks. The method is used to determine the characteristics of the given block graph, and mor ...


3
Archibald J Allen, Wilm E Donath, Alan D Dziedzic, Mark A Lavin, Daniel N Maynard, Dennis M Newns, Gustavo E Tellez: Method for prediction random defect yields of integrated circuits with accuracy and computation time controls. International Business Machines Corporation, Richard M Kotulak Esq, McGinn & Gibb PLLC, May 18, 2004: US06738954 (57 worldwide citation)

A method of computing a manufacturing yield of an integrated circuit having device shapes includes sub-dividing the integrated circuit into failure mechanism subdivisions (each of the failure mechanism subdivisions includes one or more failure mechanism and each of the failure mechanisms includes on ...


4
Wilm E Donath, Robert B Hitchcock, Jeffrey P Soreff: Method for evaluating the timing of digital machines with statistical variability in their delays. International Business Machines Corporation, Whitham & Marhoefer, November 15, 1994: US05365463 (39 worldwide citation)

An apparatus and method for simulating timing performance of designs of digital machines which allows for the avoidance of lumping of correlation of correlation coefficients which may be significant to the slacks which may occur in a particular design. Delays of particular digital elements are deriv ...


5
Wilm E Donath, Wing K Luk, Donald T Tang: Procedure to minimize total power of a logic network subject to timing constraints. International Business Machines Corporation, Sterne Kessler Goldstein & Fox, February 21, 1995: US05392221 (24 worldwide citation)

A method and apparatus for minimizing the total power of a logic network subject to timing constraints. The method describes a procedure to assign power and/or delay to each circuit in a logic network such that the total power is minimized and the arrival time requirement at the outputs of the logic ...


6
Wilm E Donath, Dennis M Newns, Pratap C Pattnaik: Ultrafast nanoscale field effect transistor. International Business Machines Corporation, Casey P August Esq, McGinn & Gibb PLLC, August 14, 2001: US06274916 (10 worldwide citation)

A method and structure for a field effect transistor (FET) includes a source region, a drain region, a channel region extending between the source region and the drain region, a gate region, and a gate oxide region separating the gate region from other regions of the FET. The channel region is a Mot ...


7
Wilm E Donath, David J Hathaway: Distributed static timing analysis. International Business Machines Corporation, H Daniel Schnurmann, Connolly Bove Lodge & Hutz, April 29, 2003: US06557151 (10 worldwide citation)

A method of distributed timing analysis for a network which has been partitioned into at least two partitions, with each partition being assigned to a separate timing analysis process which communicates with the other processes is provided. A depth first search is performed by the process assigned t ...


8
Wilm E Donath, David J Hathaway: Distributed static timing analysis. International Business Machines Corporation, Pollock Vande Sande & Amernick R L, March 13, 2001: US06202192 (8 worldwide citation)

A method of distributed timing analysis for a network which has been partitioned into at least two partitions, with each partition being assigned to a separate timing analysis process which communicates with the other processes is provided. A depth first search is performed by the process assigned t ...


9
Wilm E Donath, Prabhakar N Kudva: Method for improving the assignment of circuit locations during fabrication. International Business Machines Corporation, F Chau & Associates, November 6, 2001: US06314547 (5 worldwide citation)

The method for improving circuit location assignment is capable of operating in the boolean, electrical and spatial (location) domains. Optimization of location assignment parameters can be performed simultaneously by determining a subset of nets or paths and generating sets of motions to improve th ...



Click the thumbnails below to visualize the patent trend.