1
William S Phy: Process of forming a compliant lead frame for array-type semiconductor packages. Fairchild Semiconductor Corporation, Lee Patch, James A LaBarre, June 14, 1988: US04751199 (112 worldwide citation)

A lead frame that is suited for use on array types of integrated circuit packages to provide a high degree of compliance for absorbing mechanical stress induced by thermal changes includes a series of individual terminal elements that are connected in a strip form by means of break tabs disposed bet ...


2
William S Phy, James M Early, Kevien J Negus: Ceramic package for high frequency semiconductor devices. Fairchild Semiconductor Corporation, Townsend and Townsend, June 13, 1989: US04839717 (109 worldwide citation)

A ceramic semiconductor package suitable for high frequency operation includes internal and external ground planes formed on opposite faces of a ceramic base member. The internal ground plane is connected to a ground ring formed on the packaged semiconductor device, and both ground planes are interc ...


3
Harlan Lawler, William S Phy: Die bonding process. Fairchild Semiconductor Corporation, Lee Patch, William H Murray, September 20, 1988: US04772935 (82 worldwide citation)

A process for bonding silicon die to a package. This process comprises the following steps: (a) providing to the back surface of the die an adhesion layer of material which exhibits superior adhesion to both the silicon die and a subsequently applied barrier layer; (b) providing to the adhesion laye ...


4
William S Phy: Plastic package for high frequency semiconductor devices. Fairchild Semiconductor Corporation, Lee Patch, Robert C Colwell, James M Heslin, December 13, 1988: US04791473 (51 worldwide citation)

A plastic semiconductor package suitable for high frequency operation includes an internal ground plane connected to a ground ring formed on the packaged semiconductor device. The ground plane is included as a portion of a lead frame strip adjacent to the individual lead frames. The ground plane is ...


5
William S Phy: Semiconductor chip package configuration and method for facilitating its testing and mounting on a substrate. Fairchild Camera and Instrument Corporation, Fitch Even Tabin & Flannery, January 3, 1989: US04796080 (41 worldwide citation)

A semiconductor chip package configuration and a method are disclosed for facilitating testing of the chip package and mounting of the chip package on a substrate by forming one or more lead alignment bars in interconnecting relation with adjacent leads on the chip package, the lead alignment bars b ...


6
William S Phy: Gold/tin eutectic bonding for tape automated bonding process. National Semiconductor, Lee Patch, James M Heslin, April 23, 1991: US05008997 (32 worldwide citation)

An improved tape automated bonding method of bonding the beam leads of lead frame tape to gold bumps formed on the contact pads of a semiconductor device, wherein the tape includes a plurality of interconnected beam leads defined by at least one opening in the tape such that each beam lead has an in ...


7
William S Phy: Lead format for tape automated bonding. Fairchild Camera & Instrument, Kenneth Olsen, Michael J Pollock, Theodore Scott Park, June 28, 1983: US04390598 (27 worldwide citation)

A lead frame (20) for tape automated bonding includes individual leads (12) each having a stretch loop (40) to accommodate elongation of the loop as the lead is bonded to a substrate (28) after inner lead bonds have been formed to an integrated circuit (26). Such a lead frame allows temporary connec ...


8
William S Phy: Device for forming reference axes on an image sensor array package. Fairchild Camera and Instrument Corporation, Alan H MacPherson, Henry K Woodward, Norman E Reitz, November 22, 1977: US04058899 (11 worldwide citation)

A device for forming reference axes on an image sensor package containing an image sensor array. The device comprises an optical means having a reticle formed therein, a movable table located in a plane parallel with the plane of the optical means, a scribe mounted between the movable table and the ...


9
Michael Brueggeman, James W Clark, William S Phy: Semiconductor structure having alpha particle resistant film and method of making the same. Fairchild Semiconductor Corporation, Carl L Silverman, David H Carroll, James M Heslin, March 31, 1987: US04653175 (6 worldwide citation)

An applique of a prepatterned film of alpha particle resistant material, such as polyimide, is applied to a semiconductor wafer. The prepatterned film covers only the critical areas e.g. those affected by alpha particle impingement. Bond pads and scribe streets are not covered by the applique.


10
William S Phy: Radiation protection for integrated circuits utilizing tape automated bonding. Fairchild Camera & Instrument, Kenneth Olsen, Theodore S Park, Michael J Pollock, April 19, 1983: US04380566 (6 worldwide citation)

A technique is disclosed for protecting integrated circuits from alpha particles. A central portion of a radiation resistant insulating substrate upon which electrically conductive leads are disposed is positioned in proximity to the integrated circuit. When the leads are electrically connected to t ...