1
William F Baxter, Robert G Gelinas, James M Guyer, Dan R Huck, Michael F Hunt, David L Keating, Jeff S Kimmell, Phil J Roux, Liz M Truebenbach, Rob P Valentine, Pat J Weiler, Joseph Cox, Barry E Gillott, Andrea Heyda, Rob J Pike, Tom V Radogna, Art A Sherman, Michael Sporer, Doug J Tucker, Simon N Yeung: Bus arbitration system for multiprocessor architecture. Data General Corporation, Sewall P Bronstein, William J Dike Bronstein Roberts & Cushman Daley Jr, February 15, 2000: US06026461 (86 worldwide citation)

A very fast, memory efficient, highly expandable, highly efficient CCNUMA processing system based on a hardware architecture that minimizes system bus contention, maximizes processing forward progress by maintaining strong ordering and avoiding retries, and implements a full-map directory structure ...


2
William F Baxter, Robert G Gelinas, James M Guyer, Dan R Huck, Michael F Hunt, David L Keating, Jeff S Kimmell, Phil J Roux, Liz M Truebenbach, Rob P Valentine, Pat J Weiler, Joseph Cox, Barry E Gillott, Andrea Heyda, Rob J Pike, Tom V Radogna, Art A Sherman, Michael Sporer, Doug J Tucker, Simon N Yeung: Symmetric multiprocessing computer with non-uniform memory access architecture. Data General Corporation, Brian L Michaelis, David D Lowry, Sewell P Bronstein, March 23, 1999: US05887146 (81 worldwide citation)

A very fast, memory efficient, highly expandable, highly efficient CCNUMA processing system based on a hardware architecture that minimizes system bus contention, maximizes processing forward progress by maintaining strong ordering and avoiding retries, and implements a full-map directory structure ...


3
Michael Sgrosso, William F Baxter III, Jeffrey Kinne, Christopher S MacLellan, John O Shea: Protocol controller for a data storage system. EMC Corporation, December 8, 2009: US07631128 (37 worldwide citation)

A data storage system having protocol controller for converting packets between PCIE format used by a storage processor and Rapid IO format used by a packet switching network. The controller includes a PCIE end point for transferring atomic operation (DSA) requests, a data pipe section having a plur ...


4
William F Baxter, Robert G Gelinas, James M Guyer, Dan R Huck, Michael F Hunt, David L Keating, Jeff S Kimmell, Phil J Roux, Liz M Truebenbach, Rob P Valentine, Pat J Weiler, Joseph Cox, Barry E Gillott, Andrea Heyda, Rob J Pike, Tom V Radogna, Art A Sherman, Micheal Sporer, Doug J Tucker, Simon N Yeung: High availability computer system and methods related thereto. Data General Corporation, Sewall P Bronstein, William J Daley Jr, Dike Bronstein Roberts & Cushman, September 19, 2000: US06122756 (32 worldwide citation)

A high availability computer system and methodology including a backplane, having at least one backplane communication bus and a diagnostic bus, a plurality of motherboards, each interfacing to the diagnostic bus. Each motherboard also includes a memory system including main memory distributed among ...


5
Alexander Y Aronov, Stephen D MacArthur, Michael Sgrosso, William F Baxter III: Packet switching network end point controller. EMC Corporation, June 1, 2010: US07729239 (20 worldwide citation)

An end point controller includes two of ingress/egress port pairs. A first one of the ingress/egress ports is adapted to send and receive one of a pair of types of information packets and a second one of the ingress/egress ports is adapted to send and receive the other one of the pair of types of in ...


6
Nhut Tran, Michael Sgrosso, William F Baxter III, James M Guyer: Data storage system having CPUs adapted to perform a second atomic operation request prior to completion of a first atomic operation request. EMC Corporation, August 3, 2010: US07769928 (9 worldwide citation)

A data storage system having protocol controller for converting packets between PCIE format used by a storage processor and Rapid IO format used by a packet switching network. The controller includes a PCIE end point for transferring atomic operation (DSA) requests, a data pipe section having a plur ...


7
Nhut Tran, Michael Sgrosso, William F Baxter III, Christopher S MacLellan: Data storage system having separate atomic operation/non-atomic operation paths. EMC Corporation, April 27, 2010: US07707367 (8 worldwide citation)

A data storage system having protocol controller for converting packets between PCIE format used by a storage processor and Rapid IO format used by a packet switching network. The controller includes a PCIE end point for transferring atomic operation (DSA) requests, a data pipe section having a plur ...


8
William F Baxter III: Data storage system having crossbar packet switching network. EMC Corporation, November 14, 2006: US07136959 (6 worldwide citation)

A system interface having: a packet switching network; a cache memory; and a plurality of directors. One portion of such directors is adapted for coupling to a host computer/server and another portion of the directors is adapted for coupling to a bank of disk drives, the plurality of directors and c ...


9
Jeffrey Kinne, John O Shea, Michael Sgrosso, William F Baxter III, Christopher S MacLellan: Data storage system having plural data pipes. EMC Corporation, July 26, 2011: US07987229 (4 worldwide citation)

A data storage system having protocol controller for converting packets between PCIE format used by a storage processor and Rapid IO format used by a packet switching network. The controller includes a PCIE end point for transferring atomic operation (DSA) requests, a data pipe section having a plur ...


10
Nhut Tran, Michael Sgrosso, James M Guyer, William F Baxter III: Data storage system having acceleration path for congested packet switching network. EMC Corporation, July 12, 2011: US07979588 (4 worldwide citation)

A data storage system having protocol controller for converting packets between PCIE format used by a storage processor and Rapid IO format used by a packet switching network. The controller includes a PCIE end point for transferring atomic operation (DSA) requests, a data pipe section having a plur ...