1
Chenming Hu, Tsu Jae King, Vivek Subramanian, Leland Chang, Xuejue Huang, Yang Kyu Choi, Jakub Tadeusz Kedzierski, Nick Lindert, Jeffrey Bokor, Wen Chin Lee: Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture. The Regents of the University of California, Henry K Woodward, Townsend and Townsend and Crew, July 2, 2002: US06413802 (512 worldwide citation)

A FinFET device is fabricated using conventional planar MOSFET technology. The device is fabricated in a silicon layer overlying an insulating layer (e.g., SIMOX) with the device extending from the insulating layer as a fin. Double gates are provided over the sides of the channel to provide enhanced ...


2
Tsu Jae King, Victor Moroz: Segmented channel MOS transistor. Synopsys, Bever Hoffman & Harms, Jeanette S Harms, July 24, 2007: US07247887 (313 worldwide citation)

By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repe ...


3
Tsu Jae King, Victor Moroz: Integrated circuit on corrugated substrate. Synopsys, Bever Hoffman & Harms, Jeanette S Harms, March 13, 2007: US07190050 (231 worldwide citation)

By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repe ...


4
Tsu Jae King, Victor Moroz: Integrated circuit on corrugated substrate. Synopsys, Bever Hoffman & Harms, Jeanette S Harms, May 5, 2009: US07528465 (217 worldwide citation)

By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repe ...


5
Tsu Jae King Liu, Qiang Lu: Enhanced segmented channel MOS transistor with narrowed base regions. Synopsys, Silicon Valley Patent Group, Edward S Mao, March 24, 2009: US07508031 (213 worldwide citation)

By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably produced ...


6
Tsu Jae King, Victor Moroz: Method of IC production using corrugated substrate. Synopsys, Bever Hoffman & Harms, Jeanette S Harms, September 4, 2007: US07265008 (209 worldwide citation)

By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repe ...


7
Tsu Jae King Liu, Qiang Lu: Enhanced segmented channel MOS transistor with high-permittivity dielectric isolation material. Synopsys, Silicon Valley Patent Group, Edward S Mao, October 20, 2009: US07605449 (208 worldwide citation)

By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repe ...


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Tsu Jae King, David K Y Liu: Charge trapping device and method for implementing a transistor having a negative differential resistance mode. Progressant Technologies, J Nichols Gross, November 12, 2002: US06479862 (111 worldwide citation)

A charge trapping structure for use with an n-channel metal-insulator-semiconductor field-effect transistor (MISFET) is disclosed. A dielectric layer is formed close to a channel region of the MISFET, and includes a number of trapping sites which are arranged and have a concentration sufficient to t ...


10
Tsu Jae King, Victor Moroz: Methods of designing an integrated circuit on corrugated substrate. Synopsys, Bever Hoffman & Harms, Jeanette S Harms, June 14, 2011: US07960232 (100 worldwide citation)

By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repe ...



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