1
Tomoharu Tanaka, Gertjan Hemink: Multi-state EEPROM having write-verify control circuit. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, October 29, 1996: US05570315 (914 worldwide citation)

An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data circuits for temporarily storing data for controlling write operation states of the plurality of memory ce ...


2
Ken Takeuchi, Tomoharu Tanaka: Semiconductor device and memory system. Kabushiki Kaisha Toshiba, Banner & Witcoff, April 4, 2000: US06046935 (908 worldwide citation)

A semiconductor memory device comprises a memory cell array having electrically erasable and programmable memory cells arranged in rows and columns, each memory cell capable of storing n-value data (n is 3 or a greater natural number), and a data circuit having m latch circuits for holding data item ...


3
Jian Chen, Tomoharu Tanaka, Yupin Fong, Khandker N Quader: Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states. SanDisk Corporation, Skjerven Morrill, February 18, 2003: US06522580 (759 worldwide citation)

A non-volatile memory system having an array of memory cells with at least one storage element each is operated with a plurality of storage level ranges per storage element. A flash electrically erasable and programmable read only memory (EEPROM) is an example, wherein the storage elements are elect ...


4
Tetsuo Endoh, Yoshiyuki Tanaka, Seiichi Aritome, Riichiro Shirota, Susumu Shuto, Tomoharu Tanaka, Gertjan Hemink, Toru Tanzawa: Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, June 30, 1998: US05774397 (593 worldwide citation)

A non-volatile semiconductor memory device includes a semiconductor substrate, a memory cell including source and drain regions formed in a surface region of the semiconductor substrate, and a first gate insulating film, a charge storage layer, a second gate insulating film, and a control gate seque ...


5
Ken Takeuchi, Tomoharu Tanaka: Semiconductor device and memory system. Kabushiki Kaisha Toshiba, Banner & Witcoff, May 11, 1999: US05903495 (435 worldwide citation)

A semiconductor memory device comprises a memory cell array having electrically erasable and programmable memory cells arranged in rows and columns, each memory cell capable of storing n-value data (n is 3 or a greater natural number), and a data circuit having m latch circuits for holding data item ...


6
Tomoharu Tanaka, Jian Chen: Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell. Kabushiki Kaisha Toshiba, SanDisk Corporation, Banner & Witcoff, November 4, 2003: US06643188 (302 worldwide citation)

A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit writing a data in the memory cells by supplying a write voltage Vpgm and a write control voltage VBL t ...


7
Noboru Shibata, Tomoharu Tanaka: Semiconductor memory device for storing multivalued data. Kabushiki Kaisha Toshiba, Hogan & Hartson, December 2, 2003: US06657891 (292 worldwide citation)

Before the next data is stored into a first memory cell in which i bits of data have been stored, i or less bits of data are written into cells adjacent to the first memory cell beforehand. The writing of i or less bits of data is done using a threshold voltage lower than the original threshold volt ...


8
Ken Takeuchi, Tomoharu Tanaka, Noboru Shibata: Nonvolatile semiconductor memory having plural data storage portions for a bit line connected to memory cells. Kabushiki Kaisha Toshiba, Banner & Witcoff, April 16, 2002: US06373746 (255 worldwide citation)

Data having three values or more is stored in a memory cell in a nonvolatile manner. A data circuit has a plurality of storage circuits. One of the plurality of storage circuits is a latch circuit. Another one of the plurality of storage circuits is a capacitor. The latch circuit and the capacitor f ...


9
Jian Chen, Tomoharu Tanaka, Yupin Fong, Khandker N Quader: Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements. SanDisk Corporation, Kabushiki Kaisha Toshiba, Parsons Hsue & de Runtz, October 19, 2004: US06807095 (209 worldwide citation)

A non-volatile memory system having an array of memory cells with at least one storage element each is operated with a plurality of storage level ranges per storage element. A flash electrically erasable and programmable read only memory (EEPROM) is an example, wherein the storage elements are elect ...


10
Tetsuo Endoh, Riichiro Shirota, Kazunori Ohuchi, Ryouhei Kirisawa, Seiichi Aritome, Tomoharu Tanaka, Yoshiyuki Tanaka: Electrically erasable and programmable non-volatile memory system with write-verify controller using two reference levels. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt, January 31, 1995: US05386422 (157 worldwide citation)

An EEPROM includes an array of memory cell transistors, which is divided into cell blocks each including NAND cell units of series-connected cell transistors. A sense amplifier is connected to bit lines and a comparator. A data-latch circuit is connected to the comparator, for latching a write-data ...