1
Tom Edsall, Norman Finn: Interswitch link mechanism for connecting high-performance network switches. Cisco Systems, Cesari and McKenna, April 21, 1998: US05742604 (332 worldwide citation)

An encapsulation mechanism efficiently transports packets between ports of different switches in a network on the basis of, inter alia, virtual local area network (VLAN) associations among those ports. The switches are preferably interconnected by a novel interswitch link (ISL) mechanism that append ...


2
Mario Mazzola, Tom Edsall, Luca Cafiero: Address translation mechanism for a high-performance network switch. Cisco Systems, Cesari and McKenna, April 14, 1998: US05740171 (274 worldwide citation)

An address translation mechanism quickly and efficiently renders forwarding decisions for data flames transported among ports of a high-performance switch on the basis of, inter alia, virtual local area network (VLAN) associations among the ports. The translation mechanism comprises a plurality of f ...


3
Tom Edsall: Color blocking logic mechanism for a high-performance network switch. Cisco Technology, Cesari and McKenna, June 9, 1998: US05764636 (165 worldwide citation)

A color blocking logic (CBL) mechanism implements spanning tree states with respect to data frames transported between port interface circuitry over a link connecting different switches in a network. Each port interface circuit preferably supports multiple virtual local area network (VLAN) designati ...


4
Mario Mazzola, Tom Edsall, Massimo Prati, Luca Cafiero: Architecture for an expandable transaction-based switching bus. Cisco Technology, Cesari and McKenna, August 18, 1998: US05796732 (137 worldwide citation)

A switching bus architecture enables efficient transfer of data within a network switch having a plurality of ports interconnected by a high-performance switching bus. The architecture is preferably implemented as novel port interface and forwarding engine circuitry that cooperate to efficiently tra ...