1
Chung Wen Ma, Chun Hung Lin, Tai Yao Lee, Li Jen Lee, Ju Xu Lee, Ting Chung Hu: Method and system for managing a flash memory mass storage system. Macronix International, Mark A Wilson Sonsini Goodrich & Rosati Haynes, September 21, 1999: US05956473 (201 worldwide citation)

The present application discloses methods to provide defect management, wear leveling and data security to a mass storage system implemented using flash memory. The flash memory is organized into a plurality of blocks. Each block has a special region for storing its attributes. In defect management, ...


2
Chung Wen Ma, Chu Hung Lin, Tai Yao Lee, Li Jen Lee, Ju Xu Lee, Ting Chung Hu: Flash memory mass storage system. Macronix International, Mark A Wilson Sonsini Goodrich & Rosati Haynes, August 3, 1999: US05933368 (156 worldwide citation)

An architecture for a mass storage system using flash memory is described. This architecture involves organizing the flash memory into a plurality of blocks. These blocks are then divided into several categories. One of the categories is a working category used to store data organized in accordance ...


3
Chung Wen Ma, Chun Hung Lin, Tai Yao Lee, Li Jen Lee, Ju Xu Lee, Ting Chung Hu: Flash memory mass storage system. Macronix International, Mark A Wilson Sonsini Goodrich & Rosati Haynes, April 28, 1998: US05745418 (151 worldwide citation)

An architecture for a mass storage system using flash memory is described. This architecture involves organizing the flash memory into a plurality of blocks. These blocks are then divided into several categories. One of the categories is a working category used to store data organized in accordance ...


4
Kong Mou Liou, Tom Dang Hsing Yiu, Ray Lin Wan, Yao Wu Cheng, Chun Hsiung Hung, Ting Chung Hu, Tien Ler Lin: Technique for reconfiguring a high density memory. Macronix International, Wilson Sonsini Goodrich & Rosati, November 25, 1997: US05691945 (50 worldwide citation)

A flexible technique for improving yield of manufacturing of high density of memory devices, such as flash EEPROM, involves reconfiguring an integrated circuit memory array having a plurality of sectors selected by an address decoder in response to an N bit field in an address. If defective sectors ...


5
Kong Mou Liou, Ting Chung Hu, Ray Lin Wan, Fuchia Shone: Technique for increasing endurance of integrated circuit memory. Macronix International, Mark A Haynes, Haynes Beffel & Wolfeld, June 4, 2002: US06400634 (5 worldwide citation)

A method increases endurance of an array of memory cells which have an endurance specified according to the number of change cycles that the memory cell can endure within a performance tolerance. The method is based on arranging the array into a plurality of sectors, and assigning a subset of addres ...


6
Sheng Chang Kuo, Jhyy Cheng Liou, Ting Chung Hu: Memory I/O driving circuit with reduced noise and driving method. Solid State System, J C Patents, April 11, 2006: US07027332 (1 worldwide citation)

A memory driving circuit has a register for receiving a new-coming data and a delayed clock, and exporting a current-existing data. The delayed clock has a delay to a clock. A pre-detecting circuit receives the current-existing data, the new-coming data, and a pre-enable signal, and exports an outpu ...


7
Chih Hung Wang, Chao Han Wu, Ting Chung Hu: Control method and allocation structure for flash memory device. Solid State System, Jianq Chyun IP Office, April 29, 2014: US08713242

A control method and an allocation structure for a flash memory device are provided herein. The flash memory device has a first memory module and a second memory module. Physical blocks of the first memory module and physical blocks of the second memory module are respectively divided into a plurali ...


8
Sheng Chang Kuo, Jhyy Cheng Liou, Ting Chung Hu: Memory I/O driving circuit with reduced noise and driving method. J C Patents, November 17, 2005: US20050254312-A1

A memory driving circuit has a register for receiving a new-coming data and a delayed clock, and exporting a current-existing data. The delayed clock has a delay to a clock. A pre-detecting circuit receives the current-existing data, the new-coming data, and a pre-enable signal, and exports an outpu ...


9
Jhyy Cheng Liou, Cheng Yi Yang, Ting Chung Hu: Package structure of memory card and packaging method for the structure. J C Patents, May 25, 2006: US20060108674-A1

A package structure of a memory card includes a substrate. The substrate has connection pads on a first surface and conductive lead structures respectively coupled with the connection pads and extending to a second surface of the substrate. At least one chip is disposed over the substrate at the fir ...


10
Chih Hung Wang, Chao Han Wu, Ting Chung Hu: Control method and allocation structure for flash memory device. Solid State System, July 5, 2012: US20120173791-A1

A control method and an allocation structure for a flash memory device are provided herein. The flash memory device has a first memory module and a second memory module. Physical blocks of the first memory module and physical blocks of the second memory module are respectively divided into a plurali ...