1
Takeshi Miyajima, Norihito Tokura, Kazukuni Hara, Hiroo Fuma: Silicon carbide semiconductor device. Denso Corporation, Pillsbury Madison & Sutro, November 2, 1999: US05976936 (169 worldwide citation)

A silicon carbide semiconductor device having a high blocking voltage, low loss, and a low threshold voltage is provided. An n.sup.+ type silicon carbide semiconductor substrate 1, an n.sup.- type silicon carbide semiconductor substrate 2, and a p type silicon carbide semiconductor layer 3 are succe ...


2
Takeshi Miyajima, Norihito Tokura, Kazukuni Hara, Hiroo Fuma: Silicon carbide semiconductor device with trench. Nippondenso, Kabushiki Kaisha Toyota Chuo Kenkyusho, Pillsbury Madison & Sutro, February 1, 2000: US06020600 (114 worldwide citation)

A silicon carbide semiconductor device having a high blocking voltage, low loss, and a low threshold voltage is provided. An n.sup.+ type silicon carbide semiconductor substrate 1, an n.sup.- type silicon carbide semiconductor substrate 2, and a p type silicon carbide semiconductor layer 3 are succe ...


3
Kazukuni Hara, Norihito Tokura, Takeshi Miyajima, Hiroo Fuma, Hiroyuki Kano: Process for producing a semiconductor device having a single thermal oxidizing step. Denso Corporation, Pillsbury Madison & Sutro, June 22, 1999: US05915180 (101 worldwide citation)

A semiconductor device, which has an oxide laver with the thickness thereof being varied from portion to portion of the inner surface of a trench and can be easily produced, and a process of producing the same. An n.sup.+ type single crystal SiC substrate is formed of SiC of hexagonal system having ...


4
Yuichi Takeuchi, Takeshi Miyajima, Norihito Tokura, Hiroo Fuma, Toshio Murata, Takamasa Suzuki, Shoichi Onda: Silicon carbide semiconductor device and process for manufacturing same. Denso Corporation, Pillsbury Madison & Sutro, October 17, 2000: US06133587 (82 worldwide citation)

A n.sup.- -type source region 5 is formed on a predetermined region of the surface layer section of the p-type silicon carbide semiconductor layer 3 of a semiconductor substrate 4. A low-resistance p-type silicon carbide region 6 is formed on a predetermined region of the surface layer section in th ...


5
Kuniaki Mamitsu, Yasuyoshi Hirai, Kazuhito Nomura, Yutaka Fukuda, Kazuo Kajimoto, Takeshi Miyajima, Tomoatsu Makino, Yoshimi Nakase: Semiconductor device having radiation structure. Denso Corporation, Posz & Bethards, March 9, 2004: US06703707 (43 worldwide citation)

A semiconductor device includes two semiconductor chips that are interposed between a pair of radiation members, and thermally and electrically connected to the radiation members. One of the radiation members has two protruding portions and front ends of the protruding portions are connected to prin ...


6
Yuichi Takeuchi, Takeshi Miyajima, Norihito Tokura, Hiroo Fuma, Toshio Murata: Silicon carbide semiconductor device and process for its production. Denso Corporation, Cushman Darby & Cushman IP Group of Pillsbury Madison & Sutro, April 28, 1998: US05744826 (42 worldwide citation)

A semiconductor substrate 4 consisting of an n.sup.+ -type substrate 1, an n.sup.- -type silicon carbide semiconductor layer 2 and a p-type silicon carbide semiconductor layer 3, made of hexagonal crystal-based single crystal silicon carbide with the main surface having a planar orientation approxim ...


7
Norihito Tokura, Kunihiko Hara, Takeshi Miyajima: Semiconductor device including vertical MOSFET structure with suppressed parasitic diode operation. Nippondenso, Cushman Darby & Cushman IP Group of Pillsbury Madison & Sutro, December 9, 1997: US05696396 (24 worldwide citation)

A vertical MOSFET, which can control AC current flowing through a device only by the gate voltage, is obtained. On an n.sup.+ silicon layer is formed an n.sup.- silicon layer. Within the n.sup.- silicon layer is formed a p-body region. Within the p-body region is formed an n.sup.+ source region. On ...


8
Yuuichi Takeuchi, Takeshi Miyajima, Kazukuni Hara, Norihito Tokura: Method of manufacturing SiC semiconductor device having double oxide film formation to reduce film defects. Nippondenso, Cushman Darby & Cushman IP Group of Pillsbury Madison & Sutro, March 3, 1998: US05723376 (22 worldwide citation)

A groove is formed on the surface of a semiconductor substrate composed of silicon carbide and a first thermal oxidation film is formed by executing thermal oxidation on a damaged layer of groove inner walls. Then, the first thermal oxidation film is removed so that the damaged layer can be removed. ...


9
Masahito Mizukoshi, Eishi Kawasaki, Takeshi Miyajima, Takeshi Fukazawa: Facedown-type semiconductor pressure sensor with spacer. Nippondenso, Cushman Darby & Cushman, November 14, 1989: US04881056 (11 worldwide citation)

A facedown-type semiconductor pressure sensor has a Si sensing element including a diaphragm, a spacer, and a piezoresistive device embedded in the diaphragm, and a pedestal. The spacer, which is positioned between the semiconductor substrate and the pedestal, has a photolitho-graphically etched hol ...


10
Takeshi Miyajima, Takayuki Oshiro: Method of measuring inclining angle of planar defect of solid material by ultrasonic wave. Hitachi Construction Machinery, Wenderoth Lind & Ponack, November 22, 1988: US04785667 (10 worldwide citation)

A method of measuring the inclining angle of a planar defect of a solid material with ultrasonic waves which includes the steps of irradiating ultrasonic waves incident to the planar defect of a solid material while longitudinally scanning a probe forwardly and backwardly. The inclining angle of the ...



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