1
Tadashi Shibata: Stacked semiconductor device with sloping sides. Tokyo Shibaura Denki Kabushiki Kaisha, Oblon Fisher Spivak McClelland & Maier, February 19, 1985: US04500905 (182 worldwide citation)

Provided is a stacked semiconductor device wherein a plurality of semiconductor layers integrated with semiconductor elements are stacked with an insulating layer interposed between two adjacent of said semiconductor layers. This semiconductor device has one or more inclined faces extending over two ...


2
Tadashi Shibata: Method for manufacturing a semiconductor device. Tokyo Shibaura Denki Kabushiki Kaisha, Oblon Fisher Spivak McClelland & Maier, January 5, 1982: US04309224 (99 worldwide citation)

A method for manufacturing a semiconductor device using a polycrystalline silicon layer as an electric conductive portion such as an electrode and/or conductor, which includes steps for doping the polycrystalline silicon layer with an impurity, and applying a radiation beam at least to part of the p ...


3

4
Tadahiro Ohmi, Tadashi Shibata, Masaru Umeda: Reduced pressure surface treatment apparatus. Tadahiro Ohmi, Baker & Daniels, May 5, 1992: US05110438 (59 worldwide citation)

The reduced pressure surface treatment apparatus according the present invention comprises at least one vacuum chamber and an exhaust unit and a gas supply unit connected thereto, and it is characterized in that it is provided with a holder to hold the specimen, means to bombard the specimen with io ...


5
Yasuo Ikawa, Tadashi Shibata, Kiyoshi Urui, Misao Miyata, Masahiko Kawamura, Noboru Amano: Semiconductor integrated circuit device. Kabushiki Kaisha Toshiba, Oblon Fisher Spivak McClelland & Maier, December 23, 1986: US04631686 (55 worldwide citation)

A programmable semiconductor integrated circuit device is disclosed, which includes different kinds of MSI scale function blocks formed on a substrate. First wiring lines extending in a row direction are connected to input terminals of the function blocks, respectively. Second wiring lines are conne ...


6
Tadashi Shibata: Method of manufacturing semiconductor memory device having trench memory capacitor. Kabushiki Kaisha Toshiba, Oblon Fisher Spivak McClelland & Maier, March 25, 1986: US04577395 (48 worldwide citation)

A method of manufacturing a semiconductor memory device having a trench memory capacitor. First masks are formed on an element forming region of a semiconductor substrate formed of the element forming region and an element isolation region. A film formed of a different material from that of the firs ...


7
Tadashi Shibata: Data transfer device. Matsushita Electric Industrial, McDermott Will & Emery, April 16, 2002: US06374244 (33 worldwide citation)

A data transfer device for transferring plural asynchronous data processed and input/output at different rates includes a memory for storing data. The memory is shared between first through fourth data input/output circuits, and the data are input/output between the memory and the data input/output ...


8
Tadashi Shibata: Method of manufacturing a semiconductor device. Tokyo Shibaura Denki Kabushiki Kaisha, Oblon Fisher Spivak McClelland & Maier, July 16, 1985: US04528744 (30 worldwide citation)

A method of manufacturing a semiconductor device which comprises the steps of forming an interconnection layer through an insulating film on a semiconductor substrate, and connecting the diffusion interconnection region in the surface portion of said substrate to said interconnection layer by growin ...


9
Tadashi Shibata, Hisakazu Iizuka: Method for manufacturing a semiconductor device. Tokyo Shibaura Denki Kabushiki Kaisha, Oblon Fisher Spivak McClelland & Maier, May 12, 1981: US04267011 (28 worldwide citation)

Disclosed is a method for manufacturing a semiconductor device using a polycrystalline silicon layer as an electrode and/or wire which includes a process for applying a laser light or electron beam to the polycrystalline silicon layer prior to a patterning process, thereby preventing over-etching an ...


10
Tadashi Shibata, Tadahiro Ohmi: Neuron circuit. Tadashi Shibata, Baker & Daniels, November 2, 1993: US05258657 (27 worldwide citation)

A semiconductor device of this invention comprises on a substrate a first semiconductor region of one conductive type, first source and drain regions of the opposite conductive type formed in said semiconductor region, a first gate electrode formed in a region separating said source and drain region ...



Click the thumbnails below to visualize the patent trend.