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Swanson Jeffrey C, Ebner Sharon M, Wickeraad John A: A system and method for multiple cycle capture of chip state. Hewlett Packard Co, October 31, 2001: EP1150130-A2 (1 worldwide citation)

Test circuitry (FIG. 5) is incorporated on a chip die together with a circuit to be tested, such as an ASIC or microprocessor, to provide external access to signals that are internal to an integrated circuit chip package. A test device includes a state machine responsive to (i) an arm command for tr ...


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Swanson Jeffrey C, Sharma Debendra Das, Jones Jason: Reconfigurable fifo interface to support multiple channels in bundled agent configurations. Hewlett Packard Co, November 7, 2001: EP1152327-A2

A reconfigurable register array structure allows an agent to transmit data from a single channel or in bundled form from multiple channels. The structure makes economical use of valuable chip space by reducing the size of the overall register array system. A coalescing prestage (201) is used to coll ...


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Swanson Jeffrey C, Debendora Das Sharuma, Jones Jason: Reconstructible first-in/first-out mechanism. Hewlett Packard Co &Lt Hp&Gt, February 15, 2002: JP2002-049582

PROBLEM TO BE SOLVED: To reduce the total size of a register array system by applying a reconstructible register array structure.SOLUTION: The data can be transmitted from a single agent or a multiple agent in a band form by means of a reconstructible register array structure. A fusion pre-stage is ...


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Bilgin Selim, Looi Lily P, Swanson Jeffrey C: Method, apparatus, and system for enabling platform power states. Intel Corporation, qian weimin, January 4, 2012: CN201110094621

To address the need for power management, the following facilitates maintaining power states in an efficient manner based at least in part on managing packets at different layers of an input/output interface that supports multiple layers. One specific example prevents a destructive event for link la ...


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