1
Kunio Matsumoto, Muneo Oshima, Suguru Sakaguchi: Connecting structure for electronic part and method of manufacturing the same. Hitachi, Fay Sharpe Beall Fagan Minnich & McKee, January 9, 1990: US04893172 (178 worldwide citation)

Disclosed is a connecting structure for electrically connecting an electronic part such as an LSI chip to a substrate and a method of manufacturing the same. The present invention is suitable especially for electrical connection between a plurality of chips and a substrate which is required to have ...


2
Toshio Sugano, Kohji Nagaoka, Seiichiro Tsukui, Yoshiaki Wakashima, Michio Tanimoto, Masayuki Watanabe, Suguru Sakaguchi, Kunihiko Nishi, Aizo Kaneda, Kohji Serizawa, Michiharu Honda, Tohru Yoshida, Takeshi Komaru, Atsushi Nakamura: Semiconductor stacked device. Hitachi, Hitachi Tobu Semiconductor, Antonelli Terry Stout & Kraus, March 30, 1993: US05198888 (173 worldwide citation)

There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and ...


3
Takanobu Noro, Kunio Matsumoto, Muneo Oshima, Naoya Kanda, Suguru Sakaguchi, Akira Murata: Connecting structure of electronic part and electronic device using the structure. Hitachi, Fay Sharp Beall Fagan Minnich & McKee, February 4, 1992: US05086337 (112 worldwide citation)

This invention relates to a connecting structure for electrically connecting an electronic part such as an LSI chip to a substrate, its production method and an electronic device using the former. The present invention is particularly useful for connecting electrically a plurality of chips, for whic ...


4
Toru Yoshida, Suguru Sakaguchi, Aizo Kaneda, Kooji Serizawa, Munehisa Kishimoto, Masaaki Mutoh, Kunio Matsumoto, Isao Ohomori, Shingo Yorisaki: Method for manufacturing a semiconductor device including wafer aging, probe inspection, and feeding back the results of the inspection to the device fabrication process. Hitachi, Antonelli Terry Stout & Kraus, June 15, 1993: US05219765 (95 worldwide citation)

The present invention provides a method for manufacturing a highly reliable semiconductor device without waste by incorporating predetermined functions into a wafer in a wafer completion process, aging the wafer in a wafer aging process, distinguishing between non-defective and defective chips in a ...


5
Toshio Sugano, Kohji Nagaoka, Seiichiro Tsukui, Yoshiaki Wakashima, Michio Tanimoto, Masayuki Watanabe, Suguru Sakaguchi, Kunihiko Nishi, Aizo Kaneda, Kohji Serizawa, Michiharu Honda, Tohru Yoshida, Takeshi Komaru, Atsushi Nakamura: Stacked semiconductor memory device and semiconductor memory module containing the same. Hitachi, Hitachi Tobu Semiconductor, Antonelli Terry Stout & Kraus, August 2, 1994: US05334875 (62 worldwide citation)

There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and ...


6
Toshio Sugano, Kohji Nagaoka, Seiichiro Tsukui, Yoshiaki Wakashima, Michio Tanimoto, Masayuki Watanabe, Suguru Sakaguchi, Kunihiko Nishi, Aizo Kaneda, Kohji Serizawa, Michiharu Honda, Tohru Yoshida, Takeshi Komaru, Atsushi Nakamura: Semiconductor device and semiconductor module with a plurality of stacked semiconductor devices. Hitachi, HitachiTobu Semiconductor, Antonelli Terry Stout & Kraus, July 2, 1991: US05028986 (61 worldwide citation)

There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and ...


7
Ryohei Satoh, Muneo Oshima, Minoru Tanaka, Suguru Sakaguchi, Akira Murata, Kazuo Hirota: Electronic circuit device and method of producing the same. Hitachi, Antonelli Terry & Wands, June 16, 1987: US04673772 (57 worldwide citation)

In connecting an electronic circuit part such as a semiconductor or other part to a substrate for mounting the part with solder, the solder is composed of a high-melting-point solder portion which is subjected to working such as rolling and heat treatment in order to break the cast structure thereof ...


8
Ichiro Miyano, Kooji Serizawa, Suguru Sakaguchi, Toshiharu Ishida: Semiconductor device with reinforcement. Hitachi, Antonelli Terry Stout & Kraus, August 8, 1995: US05440171 (39 worldwide citation)

In a tape carrier type semiconductor device with reinforcement wherein tape carrier type semiconductor modules are mounted in holes or depressions enclosed by a frame, and at least one flexible circuit is stacked additionally as required, and the semiconductor modules are electrically connected to e ...


9
Ichiro Miyano, Koji Serizawa, Hiroyuki Tanaka, Tadao Shinoda, Suguru Sakaguchi: Film carrier tape and laminated multi-chip semiconductor device incorporating the same and method thereof. Hitachi, Antonelli Terry Stout & Kraus, September 8, 1998: US05804872 (27 worldwide citation)

A film carrier tape and laminated multi-chip semiconductor device incorporating the same and method thereof wherein a plurality of chip-semiconductor devices are laminated onto a substrate. Each chip semiconductor device includes a film carrier tape having leads, a semiconductor chip electrically co ...


10
Suguru Sakaguchi, Toshiharu Ishida, Kooji Serizawa, Hiroyuki Tanaka, Ichiro Miyano, Hiroshi Nakamura: Method for producing electronic part mounting structure. Hitachi, Antonelli Terry Stout & Kraus, June 6, 1995: US05421081 (13 worldwide citation)

A method for producing an electronic part mounting structure in which electronic parts such as IC packages are electrically connected to the surface of a printed circuit board utilizes a low-melting point metal. More particularly, the method provides an electronic part mounting structure capable of ...