Tjandra Winata Karta, Steven Hsu, Chien Hsiun Lee, Gene Wu, Jimmy Liang: Enhanced reliability of wafer-level chip-scale packaging (WLCSP) die separation using dry etching. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, November 23, 2010: US07838424 (27 worldwide citation)

An improved Wafer-Level Chip-Scale Packaging (WLCSP) process is described that includes forming a plurality of conductive pillars on a first surface of a semiconductor wafer. One or more grooves are dry etched into the first surface of the semiconductor wafer, where the grooves define at least one b ...

Kuo Ching Steven Hsu, Chien Min Lin, Tzong Lin Wu, Guan Tzong Wu: Capacitors with insulating layer having embedded dielectric rods. Taiwan Semiconductor Manfacturing Company, Slater & Matsil L, March 16, 2010: US07679926 (20 worldwide citation)

A circuit structure is provided. The circuit structure includes a capacitor including a top capacitor electrode; a bottom capacitor electrode parallel to the top capacitor electrode; and an insulating layer between the top and the bottom capacitor electrodes. The insulating layer includes a dielectr ...

Chih Hua Chen, Chen Shien Chen, Chen Cheng Kuo, Kuo Ching “Steven” Hsu, Kai Ming Ching: Through-silicon vias and methods for forming the same. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, July 2, 2013: US08476769 (14 worldwide citation)

An integrated circuit structure and methods for forming the same are provided. The integrated circuit structure includes a substrate; a through-silicon via (TSV) extending into the substrate; a TSV pad spaced apart from the TSV; and a metal line over, and electrically connecting, the TSV and the TSV ...

Jimmy Liang, Gene Wu, Steven Hsu: Ball-mounting method for coplanarity improvement in large package. Taiwan Semiconductor Manufacturing Company, Slater & Matsil L, January 5, 2010: US07642129 (3 worldwide citation)

A method of forming a packaging structure and the packages formed thereof are provided. The method includes providing a package having a top surface and placing solder balls on the top surface of the package. A coplanar surface is then placed against the solder balls, wherein the surface is non-adhe ...


Jai Seung Choi, Kelvin Yu Chung Liang, Shente Steven Hsu, Eric Chi Kuo Lee: Venous-arterial detector and pressure indicator. Device Evolutions, PatentBest, Andrew McAleavey, November 17, 2009: US07618370 (2 worldwide citation)

A venous-arterial detector is disclosed. The detector includes a first chamber in fluid communication with a needle, and an indicator chamber in selective fluid communication with the first chamber through a valve. The indicator chamber is pre-pressurized to a defined pressure that preferably exceed ...

Che Hung Huang, Steven Hsu: Process for forming a high-quality interface between a plated and a non-plated area. High Tech Computer, J C Patents, April 12, 2005: US06878260 (2 worldwide citation)

A process for forming an interface (106) between a plated and a non-plated area (102, 104) on the surface of a plastic component (100) is disclosed. First, an anti-plating layer (110) is formed over the surface of the plastic component. Thereafter, a low-power laser beam (10) is used to remove a por ...

Steven Hsu, Ram Krishnamurthy: Low-noise leakage-tolerant register file technique. Intel Corporation, Fleshner & Kim, January 9, 2007: US07161826 (1 worldwide citation)

A memory circuit includes a word line, a data storage circuit including one or more memory cells or sub-cells, and an inverter coupled between the word line and the N memory cells. The inverter inverts a word-line signal input into a read port of the cells or sub-cells. Because the word-line inverte ...

Mark Anders, Himanshu Kaul, Sanu Mathew, Steven Hsu, Amit Agarwal, Ram Krishnamurthy: Method and apparatus for video processing. Intel Corporation, Trop Pruner & Hu P C, September 11, 2012: US08265135

In one embodiment, the invention includes a method for compressing video data using redundant binary mathematics. Other embodiments are described and claimed.

Amit Agarwal, Steven Hsu, Ram Krishnamurthy: Common N-well state retention flip-flop. Intel Corporation, Schwabe Williamson & Wyatt P C, May 2, 2017: US09641160

Embodiments include apparatuses, methods, and systems for state retention electronic devices. In embodiments, an electronic device may include a state retention flip-flop having a plurality of P-type metal oxide semiconductor (PMOS) devices coupled with a common N-well, with one or more of the plura ...