1
Zoran Krivokapic, Judy Xilin An, Srikanteswara Dakshina Murthy, Haihong Wang, Bin Yu: Narrow fin FinFET. Advanced Micro Devices, Harrity & Snyder, July 26, 2005: US06921963 (221 worldwide citation)

A narrow channel FinFET is described herein with a narrow channel width. A protective layer may be formed over the narrow channel, the protective layer being wider than the narrow channel.


2
Matthew S Buynoski, Srikanteswara Dakshina Murthy, Cyrus E Tabery, Haihong Wang, Chih Yuh Yang, Bin Yu: Method for forming fins in a FinFET device using sacrificial carbon layer. Advanced Micro Devices, Harrity & Snyder L, November 11, 2003: US06645797 (176 worldwide citation)

A method for forming a fin in a semiconductor device that includes a substrate, an insulating layer formed on the substrate, and a conductive layer formed on the insulating layer, includes forming a carbon layer over the conductive layer and forming a mask over the carbon layer. The method further i ...


3
Srikanteswara Dakshina Murthy, Chih Yuh Yang, Bin Yu: Epitaxially grown fin for FinFET. Advanced Micro Devices, Harrity & Snyder, December 28, 2004: US06835618 (162 worldwide citation)

A method of forming a fin for a fin field effect transistor (FinFET) includes defining a trench in a layer of first material, where a width of an opening of the trench is substantially smaller than a thickness of the layer. The method further includes growing a second material in the trench to form ...


4
Philip A Fisher, Marina V Plat, Chih Yuh Yang, Christopher F Lyons, Scott A Bell, Douglas J Bonser, Lu You, Srikanteswara Dakshina Murthy: Modified film stack and patterning strategy for stress compensation and prevention of pattern distortion in amorphous carbon gate patterning. Advanced Micro Devices, Foley & Lardner, August 10, 2004: US06773998 (149 worldwide citation)

A method for an integrated circuit includes the use of an amorphous carbon ARC mask. A layer of amorphous carbon material is deposited above a layer of conductive material, and a layer of anti-reflective coating (ARC) material is deposited over the layer of amorphous carbon material. The layer of am ...


5
Siddhartha Panda, Richard Wise, Srikanteswara Dakshina Murthy, Kamatchi Subramanian: Silicon nitride etching methods. International Business Machines Corporation, Todd M C Li, Hoffman Warnick & D Alessandro, October 30, 2007: US07288482 (128 worldwide citation)

Methods of etching silicon nitride material, and more particularly, etching nitride selective to silicon dioxide or silicide, are disclosed. The methods include exposing a substrate having silicon nitride thereon to a plasma including at least one fluorohydrocarbon and a non-carbon containing fluori ...


6
Srikanteswara Dakshina Murthy, Judy Xilin An, Zoran Krivokapic, Haihong Wang, Bin Yu: Strained channel finfet. Advanced Micro Devices, Harrity & Snyder, October 12, 2004: US06803631 (91 worldwide citation)

A semiconductor structure includes a fin and a layer formed on the fin. The fin includes a first crystalline material having a rectangular cross section and a number of surfaces. The layer is formed on the surfaces and includes a second crystalline material. The first crystalline material has a diff ...


7
Srikanteswara Dakshina Murthy, Douglas Bonser, Hans Van Meer, David Brown: Selective epitaxial growth for tunable channel thickness. Advanced Micro Devices, September 12, 2006: US07105399 (83 worldwide citation)

Gate electrodes with selectively tuned channel thicknesses are formed by selective epitaxial growth. Embodiments include forming shallow trench isolation regions in an SOI substrate, selectively removing the nitride stop layer and pad oxide layer in an exposed particular active region, and implement ...


8
Bin Yu, Shibly S Ahmed, Judy Xilin An, Srikanteswara Dakshina Murthy, Zoran Krivokapic, Haihong Wang: Semiconductor device having a U-shaped gate structure. Advanced Micro Devices, Harrity & Snyder, December 21, 2004: US06833588 (80 worldwide citation)

A double-gate semiconductor device includes a substrate, an insulating layer, a fin and a gate. The insulating layer is formed on the substrate and the gate is formed on the insulating layer. The fin has a number of side surfaces, a top surface and a bottom surface. The bottom surface and at least a ...


9
Srikanteswara Dakshina Murthy, Judy Xilin An, Zoran Krivokapic, Haihong Wang, Bin Yu: Strained channel FinFET. Advanced Micro Devices, Harrity & Snyder, May 24, 2005: US06897527 (73 worldwide citation)

A semiconductor device includes a fin and a layer formed on at least a portion of the fin. The fin includes a first crystalline material. The layer includes a second crystalline material, where the first crystalline material has a larger lattice constant than the second crystalline material to induc ...


10
Chih Yuh Yang, Shibly S Ahmed, Srikanteswara Dakshina Murthy, Cyrus E Tabery, Haihong Wang, Bin Yu: Method for forming a fin in a finFET device. Advanced Micro Devices, Harrity & Snyder, September 7, 2004: US06787854 (73 worldwide citation)

A method for forming a fin structure on a silicon-on-insulator (SOI) wafer that includes a silicon layer on an insulating layer that is formed over a semiconductor substrate includes etching the silicon layer using a first etch procedure, etching, following the first etch procedure, the silicon laye ...