1
Anderson David W, Gustafson Richard N, Johnson Lance H, Sparacio Francis J, Tomas William M, Webster James J: Central processing unit with hardware controlled checkpoint and retry facilities. International Business Machines Corporation, May 29, 1973: US3736566 (123 worldwide citation)

A data processing system with a central processing unit (CPU), main store (MS), and high speed storage (HSS) interposed between the CPU and store. The CPUhas a high degree of overlap and pipelining. That is, a plurality of instructions are buffered and predecoded through several stages prior to issu ...


2
Anderson David W, Gustafson Richard N, Johnson Lance H, Sparacio Francis J: High speed buffer operation in a multi-processing system. International Business Machines Corporation, May 22, 1973: US3735360 (89 worldwide citation)

Described is an interlocking scheme which permits multiprocessing in a shared storage configuration with each central processing unit (CPU) having a private high-speed buffer storage utilizing the store-in-buffer concept. The basic problem solved is insuring that all processors access the latest cop ...


3

4