1
Toshiya Okamoto, Souichi Miyata: Multistage data flow processor with instruction packet, fetch, storage transmission and address generation controlled by destination information. Sharp Kabushiki Kaisha, May 19, 1992: US05115510 (83 worldwide citation)

An information processor includes a program memory for storing a data flow program having destination information and instruction information as one set. Destination information, instruction information and operand data included in an input data packet are latched in an input data latching portion. ...


2
Hajime Asano, Hiroaki Terada, Katsuhiko Asada, Hiroaki Nishikawa, Masahisa Shimizu, Hiroki Miura, Kenji Shima, Shinji Komori, Souichi Miyata, Satoshi Matsumoto: Tag Data processing apparatus for a data flow computer. Matsushita Electric Industrial, Sanyo Electric, Mitsubishi Denki Kabushiki Kaisha, Sharp Corporation, Cushman Darby & Cushman, June 20, 1989: US04841436 (66 worldwide citation)

A tag data processing apparatus is described for use in a data flow computer utilizing a tagged token scheme. A tag adding process and tag restoring process are executed by using pipeline registers, a queue memory and simple control circuit, thereby obtaining high speed operation and superior throug ...


3
Hajime Asano, Hiroaki Terada, Katsuhiko Asada, Hiroaki Nishikawa, Masahisa Shimizu, Hiroki Miura, Kenji Shima, Shinji Komori, Souichi Miyata, Satoshi Matsumoto: Information processing apparatus for a data flow computer. Matsushita Electric Industrial, Sanyo Electric, Mitsubishi Denki Kabushiki Kaisha, Sharp Corporation, Cushman Darby & Cushman, July 24, 1990: US04943916 (58 worldwide citation)

By providing a tag data renewing unit in a data flow-computer, the "delay" function, which is necessary for a digital filter, etc., can be realized, and it is unnecessary to keep the order relation for tokens with respect to first-in/first-out, which must be kept at respective points in a convention ...


4
Manabu Yumoto, Tsuyoshi Muramatsu, Souichi Miyata: Data transfer control unit for reducing memory requirements in an information processor by converting bit width of data being transferred between memory and processing parts. Sharp Kabushiki Kaisha, September 1, 1998: US05802399 (58 worldwide citation)

A data transfer control unit for controlling data transfer between a main processing part executing information processing and a memory part accessed by the main processing part has a bit width control part for controlling the bit width of the transferred data so that a first bit width of a port for ...


5
Satoshi Matsumoto, Futoshi Miyamae, Daisuke Azuma, Souichi Miyata: FIFO buffer with folded data transmission path permitting selective bypass of storage. Sharp Kabushiki Kaisha, January 28, 1992: US05084837 (35 worldwide citation)

A first-in first-out type memory is used as a buffer for data transfer between asynchronous systems. This buffer memory has a minimum delay elastic buffer function in which the number of data storage stages is changed according to the data transfer situation in an output portion of the memory. The d ...


6
Koji Komatsu, Shinichi Yoshida, Souichi Miyata, Daisuke Azuma: Data processor for detecting identical data coexisting in a plurality of data section of data transmission paths. Sharp Kabushiki Kaisha, May 31, 1994: US05317756 (33 worldwide citation)

So-called template matching processing is function-distributed into a pre-detecting portion and a template matching portion, processing in the respective portions being achieved by a hardware circuit. In the pre-detecting portion, the relationship between data which simultaneously exist in the deter ...


7
Souichi Miyata, Satoshi Matsumoto, Shin ichi Yoshida, Toshiya Okamoto, Takeshi Fukuhara, Shinji Komori, Tetsuo Yamasaki, Kenji Shima: Parallel processing development system with debugging device includes facilities for schematically displaying execution state of data driven type processor. Sharp Kabushiki Kaisha, Mitsubishi Denki Kabushiki Kaisha, Lowe Price Leblanc & Becker, November 17, 1992: US05165036 (28 worldwide citation)

A parallel processor developing system comprises a control computer, an interface portion, a processing element, a tracer portion and a display portion. The processing element comprises a data driven type processor. The interface portion stores data packets supplied from the control computer and app ...


8
Hiroaki Terada, Katsuhiko Asada, Hiroaki Nishikawa, Souichi Miyata, Hajime Asano, Masahisa Shimizu, Kenji Shima, Shinji Komori: Information processor capable of data transfer among plural digital data processing units by using an active transmission line having locally controlled storage of data. Sharp Kabushiki Kaisha, Matsushita Electric Industrial, Sanyo Electric, Mitsubishi Denki Kabushiki Kaisha, Staas & Halsey, November 28, 1989: US04884192 (26 worldwide citation)

In an information processor, input interface units (161, 162) are connected to one ring data bus (191) through jointing units (201, 202) and data processing units (181 and 185) are connected to the ring data bus (191) through jointing units (203 through 206) and branching units (221 through 224). Da ...


9
Souichi Miyata, Kouichi Hatakekyama, Tsuyoshi Muramatsu: Refresh control circuit for memory. Sharp Kabushiki Kaisha, June 21, 1994: US05323352 (23 worldwide citation)

A refresh control circuit includes a refresh request generating circuit, a multiplexer, a memory access control circuit and an elimination control circuit. The refresh request generating circuit periodically outputs a transfer pulse and a refresh packet for refreshing. The merging control circuit re ...


10
Shinichi Yoshida, Souichi Miyata: Data flow type information processor with plural output program storing apparatus. Sharp Kabushiki Kaisha, March 3, 1992: US05093919 (21 worldwide citation)

A program storing portion in a data flow type information processor has one input port and two output ports. The two output ports are coupled to a paired data detecting portion through two transmission paths. A program storing portion has a copy function of generating a copy data packet from an orig ...