1
Harold L McFarland, David R Stiles, Korbin S Van Dyke, Shrenik Mehta, John G Favor, Dale R Greenley, Robert A Cargnoni: Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags. Nexgen Microsystems, Townsend and Townsend Khourie and Crew, July 6, 1993: US05226126 (369 worldwide citation)

A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report terminat ...


2
Harold L McFarland, David R Stiles, Korbin S Van Dyke, Shrenik Mehta, John Gregory Favor, Dale R Greenley, Robert A Cargnoni: Method and apparatus for debugging an integrated circuit. Advanced Micro Devices, B Noël Kivlin, Conley Rose & Tayon PC, December 24, 2002: US06499123 (154 worldwide citation)

An integrated circuit having a normal mode for operating under normal operating conditions and a debug mode for operating to test and debug the integrated circuit. The integrated circuit includes a plurality of output pins that carry a first plurality of signals in the normal mode and carry a second ...


3
Harold L McFarland, David R Stiles, Korbin S Van Dyke, Shrenik Mehta, John G Favor, Dale R Greenley, Robert A Cargnoni: Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts. NexGen, Townsend and Townsend Khourie and Crew, August 15, 1995: US05442757 (103 worldwide citation)

A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report terminat ...


4
Harold L McFarland, David R Stiles, Korbin S Van Dyke, Shrenik Mehta, John Gregory Favor, Dale R Greenley, Robert A Cargnoni: Semi-Autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for sepculative and out-of-order execution of complex instructions. Advanced Micro Devices, Townsend and Townsend and Crew, June 16, 1998: US05768575 (95 worldwide citation)

A pipeline control system for implementing a virtual architecture having complex instruction set is distributed over RISC-like semi-autonomous functional units in a processor. Decoder logic fetches instructions of the target architecture and translates them into simpler RISC-like operations. These o ...


5
Harold L McFarland, David R Stiles, Korbin S Van Dyke, Shrenik Mehta, John Gregory Favor, Dale R Greenley, Robert A Cargnoni: Semi-autonomous RISC pipelines for overlapped execution of RISC-like instructions within the multiple superscalar execution units of a processor having distributed pipeline control for speculative and out-of-order execution of complex instructions. Advanced Micro Devices, Townsend and Townsend and Crew, July 14, 1998: US05781753 (50 worldwide citation)

A pipeline control system for implementing a virtual architecture having a complex instruction set is distributed over RISC-like semi-autonomous functional units in a processor. Decoder logic fetches instructions of the target architecture and translates them into simpler RISC-like operations. These ...


6
Harold L McFarland, David R Stiles, Korbin S Van Dyke, Shrenik Mehta, John Gregory Favor, Dale R Greenley, Robert A Cargnoni: Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts. Advanced Micro Devices, Townsend and Townsend and Crew, March 9, 1999: US05881265 (21 worldwide citation)

A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report terminat ...


7
Harold L McFarland, David R Stiles, Korbin S Van Dyke, Shrenik Mehta, John Gregory Favor, Dale R Greenley, Robert A Cargnoni: Method and apparatus for executing string instructions. Advanced Micro Devices, Townsend and Townsend and Crew, April 3, 2001: US06212629 (20 worldwide citation)

A pipeline control system for implementing a virtual architecture having a complex instruction set is distributed over RISC-like semi-autonomous functional units in a processor. Decoder logic fetches instructions of the target architecture and translates them into simpler RISC-like operations. These ...


8
Harold L McFarland, David R Stiles, Korbin S Van Dyke, Shrenik Mehta, John Gregory Favor, Dale R Greenley, Robert A Cargnoni: Computer processor with distributed pipeline control that allows functional units to complete operations out of order while maintaining precise interrupts. Advanced Micro Devices, Townsend and Townsend and Crew, October 28, 1997: US05682492 (12 worldwide citation)

A pipeline control system is distributed over the functional units (15, 17, 20, 25) in a processor (10). Decoder logic (12) issues operations, each with an associated tag, to the functional units, with up to n operations allowed to be outstanding. The units execute the operations and report terminat ...