1
Ryo Matsubara, Hirotsugu Fusayasu, Shinichi Tanimoto, Seiji Hamada: Differential transmission line connector. Panasonic Corporation, Wenderoth Lind & Ponack L, September 27, 2011: US08027391 (144 worldwide citation)

A differential transmission line connector with little unwanted radiation noise is provided. A connector connects a differential transmission pattern for multiple transmission of a group of three differential signals and a differential transmission cable. The differential transmission pattern is pro ...


2
Ryuzo Nakatsuka, Setsuo Suzuki, Shinichi Tanimoto, Eiji Funatsu: Protein-starch binary molding composition and shaped articles obtained therefor. Sumitomo Bakelite Company, Karl W Flocks, February 28, 1978: US04076846 (136 worldwide citation)

An edible, water-soluble, thermoplastic molding composition comprising a starch material, a neutral inorganic alkali salt of protein material, water, an edible plasticizer, an edible lubricant, and other additives. This composition shows excellent moldability and processability when subjected to var ...


3
Yasunori Inoue, Kazutoshi Tsujimura, Shinichi Tanimoto, Yasuhiko Yamashita, Kiyoshi Yoneda, Yoshikazu Ibara: Semiconductor device having cap-metal layer. Sanyo Electric, Sheridan Ross P C, June 3, 1997: US05635763 (29 worldwide citation)

A semiconductor device is disclosed, which includes an insulating layer and an interconnection layer having a conductive layer provided over the insulating layer. The interconnection layer is patterned by photolithography. The device further includes a cap-metal layer, which is deposited on the cond ...


4
Shinji Miura, Yukihiro Fukumoto, Hirokazu Uemura, Yoshiyuki Saito, Hiroshi Ikeda, Takeshi Nakayama, Osamu Shibata, Shinichi Tanimoto: Circuit board design aiding apparatus, design aiding method, and storage medium storing design aiding program. September 30, 2003: US06629302 (23 worldwide citation)

A design aiding apparatus and a method, and a storage medium storing a design aiding program enable the efficient layout design of components in a multilayer wiring board formed by laminating a plurality of wiring layers. The design aiding apparatus includes (a) a first acquiring unit for acquiring ...


5
Ryo Matsubara, Hirotsugu Fusayasu, Shinichi Tanimoto, Seiji Hamada: Transmission cable. Panasonic Corporation, Wenderoth Lind & Ponack L, August 24, 2010: US07781677 (13 worldwide citation)

A transmission cable that has three signal lines, and in which there is little unwanted radiation noise, is provided. In a section that is perpendicular to the longitudinal direction of the differential transmission cable, the distance between any two signal lines of the three signal lines is equal ...


6
Hideki Mizuhara, Shinichi Tanimoto, Hiroyuki Watanabe, Yasunori Inoue: Semiconductor device having upper and lower wiring layers. Sanyo Electric Company, Sheridan Ross P C, April 27, 1999: US05898221 (12 worldwide citation)

A semiconductor device having a semiconductor substrate and a wiring layer, which is doped with an impurity, located on the substrate. The semiconductor device has upper and lower wiring layers apart from each other. An electric insulating film electrically insulates between the upper and lower wiri ...


7
Hirotsugu Fusayasu, Seiji Hamada, Shinichi Tanimoto, Ryo Matsubara: Differential transmission line. Panasonic Corporation, Wenderoth Lind & Ponack L, June 22, 2010: US07741876 (12 worldwide citation)

A differential transmission line that has three or more signal lines and with which there is little unwanted radiation noise is provided. The differential transmission line 2 is provided with three signal lines 2a, 2b, and 2c that transmit differential signals from a differential driver IC1 to a dif ...


8
Takeshi Nakayama, Yukihiro Fukumoto, Hiroshi Ikeda, Shinichi Tanimoto: Computer aided design apparatus for aiding design of a printed wiring board to effectively reduce noise. Matsushita Electric Industrial, October 10, 2006: US07120885 (8 worldwide citation)

A CAD apparatus includes a determining unit for determining a component order in ascending order of impedance of components for passive components amongst components to be placed on a printed wiring board. The CAD apparatus places each passive component in the determined component order in a vicinit ...


9
Yasunori Inoue, Kazutoshi Tsujimura, Shinichi Tanimoto, Yasuhiko Yamashita, Kiyoshi Yoneda, Yoshikazu Ibara: Semiconductor device having cap-metal layer. Sanyo Electric, Sheridan Ross P C, April 20, 1999: US05895265 (7 worldwide citation)

A semiconductor device includes an insulating layer and an interconnection layer having a conductive layer provided over the insulating layer. The interconnection layer is patterned by photolithography. The device further includes a cap-metal layer, which is deposited on the conductive layer and sup ...


10
Shinichi Tanimoto, Syoichi Mimura: Layout check system. Matsushita Electric Industrial, October 3, 2006: US07117459 (7 worldwide citation)

A layout check system checks whether a layout of a power source, a component including a power pin, and a bypass capacitor on a PCB and defined by layout data created using a CAD system allows the bypass capacitor to function effectively. A storage unit stores the layout data that includes informati ...