1
Shafidul Islam, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Advanced Interconnect Technologies, White & Case, November 2, 2004: US06812552 (184 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so t ...


2
Shafidul Islam, Romarico Santos San Antonio, Anang Subagio: Die pad for semiconductor packages and methods of making and using same. Advanced Interconnect Technologies, Wiggin and Dana, Gregory S Rosenblatt, August 28, 2007: US07262491 (44 worldwide citation)

A semiconductor device package comprising a semiconductor device and an electrically conductive lead frame at least partially covered by a molding compound. The electrically conductive lead frame includes a plurality of leads disposed proximate a perimeter of the package and a die pad disposed in a ...


3
Shafidul Islam, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Advanced Interconnect Technologies, White & Case, October 31, 2006: US07129116 (25 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so t ...


4
Shafidul Islam, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Advanced Interconnect Technologies, White & Case, August 17, 2004: US06777265 (24 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so t ...


5
Shafidul Islam, Romarico S San Antonio: Reversible leadless package and methods of making and using same. Unisem, Wiggin and Dana, May 4, 2010: US07709935 (23 worldwide citation)

A semiconductor device package includes an electrically conductive lead frame having a plurality of posts disposed at a perimeter of the package. Each of the posts has a first contact surface disposed at the first package face and a second contact surface disposed at the second package face. The lea ...


6
Shafidul Islam, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Unisem, White & Case, November 24, 2009: US07622332 (22 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so t ...


7
James A Kennon, Shafidul Islam, Jeffrey L Popken, Jerry B Medders, Susan S Fitzgerald, Donald R Kelley, Philip A Burr: New IC molding process. Texas Instruments Incorporated, Frederick J Telecky Jr, James T Comfort, Melvin Sharp, March 14, 1989: US04812114 (18 worldwide citation)

A molding system and process is disclosed to interface with existing wire bonders using a single track design from the bonder through the molding process. During the molding operation, the bonded lead frame is transferred into the mold on a guide track system built into the mold chase. The mold clos ...


8
Shafidul Islam, Daniel K Lau, Romarico S San Antonio, Anang Subagio, Michael H McKerreghan, Edmunda G O Litilit: Semiconductor device package and method for manufacturing same. Unisem, Wiggin and Dana, July 21, 2009: US07563648 (14 worldwide citation)

A lead frame (52, 100, 112) for a semiconductor device (die) package (50, 102, 110) is described. Each of the leads (60) in the lead frame (52, 100, 112) includes an interposer (64) having one end (66) disposed proximate the outer face (58) of the package (50, 102, 110) and another end (68) disposed ...


9
Shafidul Islam, Romarico Santos San Antonio, Anang Subagio: Lead frame routed chip pads for semiconductor packages. Unisem, Wiggin and Dana, September 14, 2010: US07795710 (9 worldwide citation)

A redistributed lead frame for use in molded plastic semiconductor package (38) is formed from an electrically conductive substrate by a sequential metal removal process. The process includes: (a) patterning a first side of an electrically conductive substrate to form an array of lands separated by ...


10
Shafidul Islam, Romarico Santos San Antonio, Anang Subagio: Lead frame routed chip pads for semiconductor packages. Unisem, Wiggin and Dana, October 26, 2010: US07820480 (5 worldwide citation)

A redistributed lead frame for use in a molded plastic semiconductor package (38) is formed from an electrically conductive substrate by a sequential metal removal process. The process includes: (a) patterning a first side of an electrically conductive substrate to form an array of lands separated b ...