1
Heonchul Park, Seungyoon P Song: Opportunistic operand forwarding to minimize register file read ports. Samsung Electronics, Alan H MacPherson, David T Millers, Skjerven Morrill MacPherson Franklin & Friel, August 25, 1998: US05799163 (26 worldwide citation)

Instruction issue rate is enhanced by passing multiple instructions to a read stage when the number of required source operands exceeds the read capability of a register file but operand forwarding reduces the number of reads required. The multiple instructions can be issued for execution with sourc ...


2
Seungyoon P Song, Stephen C Horne: Interlock acquisition for critical code section execution in a shared memory common-bus individually cached multiprocessor system. Advanced Micro Devices, Foley & Lardner, February 22, 1994: US05289588 (22 worldwide citation)

There is disclosed an interlock variable acquisition system and method for use in a processing system of the type including a plurality of processors coupled by a common bus which permits exclusive execution of critical sections by each of the processors while limiting traffic on the common bus. A c ...


3
Seungyoon P Song: System for instruction completion independent of result write-back responsive to both exception free completion of execution and completion of all logically prior instructions. International Business Machines Corporation, Michael A Davis Jr, September 24, 1996: US05559976 (19 worldwide citation)

A processing system and method of operation are provided. Multiple instructions are dispatched in a sequence to execution circuitry. Ones of the instructions are executed with the execution circuitry, and respective results are output in response thereto, Each executed instruction is completed in re ...


4
Seungyoon P Song: Processing system and method of operation for processing dispatched instructions with detected exceptions. International Business Machines Corporation, Michael A Davis Jr, August 13, 1996: US05546599 (16 worldwide citation)

A processing system and method of operation are provided. A determination is made about whether to dispatch an instruction to execution circuitry for execution. After determining to dispatch the instruction, a determination is made about whether an exception condition exists for the instruction. The ...


5
Seungyoon P Song: Processing system with lock spaces for providing critical section access. Advanced Micro Devices, Foley & Lardner, June 14, 1994: US05321825 (15 worldwide citation)

A processing system of the type including a plurality of processors for executing instructions including critical sections is arranged to permit only one processor at a time to execute a critical section. The system includes a common bus coupling the processors together, a memory for storing instruc ...


6
Marvin A Denman, Artie A Pennington, Seungyoon P Song: System for speculatively executing instructions wherein mispredicted instruction is executed prior to completion of branch processing. International Business Machines Corporation, Motorola, Michael A Davis Jr, June 4, 1996: US05524224 (13 worldwide citation)

A processing system and method of operation are provided, In response to a branch instruction, a first instruction is processed so that a storage location is associated with the first instruction prior to execution of the branch instruction. In response to execution of the branch instruction, a seco ...


7
Seungyoon P Song: System and method for processing an instruction in a processing system. International Business Machines Corporation, Michael A Davis Jr, August 20, 1996: US05548738 (12 worldwide citation)

A processing system and method of operation are provided. Multiple instructions are dispatched in a sequence to execution circuitry for execution. For each instruction, a determination is made in advance of execution about whether an exception is possible to result from execution of the instruction. ...


8
Seungyoon P Song: Field-programmable dynamic logic array. Elan Research, Sawyer Law Group, September 2, 2003: US06614258 (7 worldwide citation)

Dynamic PLAs are used as the basis of constructing a new class of programmable devices called field-programmable dynamic logic arrays (FPDLAs). Unlike existing programmable devices that use static logic, the FPDLAs use reprogrammable, reconfigurable, and fixed-function dynamic PLAs in programmable m ...


9
Seungyoon P Song: Software control of DRAM refresh to reduce power consumption in a data processing system. Elan Research, Sawyer Law Group, April 1, 2003: US06542958 (5 worldwide citation)

A method and system for controlling refresh of a plurality of dynamic random access memory (DRAM) cells in a data processing system is disclosed. The method and system comprises of providing at least one valid bit to control the refresh of at least one row of DRAM cells and providing a set of comman ...


10
Seungyoon P Song: Dynamic programmable logic array that can be reprogrammed and a method of use. Elan Research, Sawyer Law Group, February 19, 2002: US06348812 (2 worldwide citation)

A dynamic PLA (DPLA) that combines registers and dynamic PLA to make the array “reprogrammable” after the array is built is disclosed. The DPLA comprises at least one logic plane; and at least one reprogrammable evaluate module within the at least one logic plane. The at least one reprogrammable eva ...