1
Varadarajan Srinivasan, Bindiganavale S Nataraj, Sandeep Khanna: Method and apparatus for cascading content addressable memory devices. NetLogic Microsystems, Blakely Sokoloff Taylor & Zafman, November 14, 2000: US06148364 (115 worldwide citation)

A method and apparatus for cascading content addressable memory (CAM) devices is disclosed. The method and apparatus may be particularly useful when depth cascading CAM devices that operate in a flow-through mode. In the flow-through mode, a compare instruction may be simultaneously provided to each ...


2
Bindiganavale S Nataraj, Sandeep Khanna, Varadarajan Srinivasan: Ternary content addressable memory cell. NetLogic Microsystems, Blakely Sokoloff Taylor & Zafman, November 28, 2000: US06154384 (95 worldwide citation)

A ternary content addressable memory (CAM) cell. For one embodiment, the ternary CAM cell includes a first memory cell, a compare circuit, a second memory cell and a mask circuit. The first memory cell is coupled to a first pair of bit lines that carries data to and from the first memory cell. The c ...


3
Varadarajan Srinivasan, Sandeep Khanna, Bindiganavale S Nataraj: Method and apparatus for simultaneously performing a plurality of compare operations in content addressable memory device. NetLogic Microsystems, Blakely Sokoloff Taylor & Zafman, October 24, 2000: US06137707 (89 worldwide citation)

A method and apparatus for simultaneously performing a plurality compare operations in a content addressable memory (CAM) device. For one embodiment, the CAM device includes a CAM array having a plurality of CAM cells, a first comparand register for storing first comparand data, and a second compara ...


4
Varadarajan Srinivasan, Bindiganavale S Nataraj, Sandeep Khanna: Method for longest prefix matching in a content addressable memory. NetLogic Microsystems, William L Paradice III, May 22, 2001: US06237061 (89 worldwide citation)

A ternary content addressable memory is employed to perform a longest prefix match search. Each CAM cell within the ternary CAM has an associated mask cell so that the CAM cells may be individually masked so as to effectively store either a logic 0, a logic 1, or a don't care for compare operat ...


5
Bindiganavale S Nataraj, Nilesh A Gharia, Rupesh R Roy, Jose P Pereira, Varadarajan Srinivasan, Sandeep Khanna, Hok F Wong: Content addressable memory with selectable mask write mode. NetLogic Microsystems, Shemwell Gregory & Courtney, June 29, 2004: US06757779 (78 worldwide citation)

A content addressable memory (CAM) that includes a CAM array and a write circuit. The write circuit is coupled the CAM array and has a coding circuit to convert a first value into a second value, and a select circuit to select either the first value or the second value to be stored in the CAM array.


6
Varadarajan Srinivasan, Bindiganavale S Nataraj, Sandeep Khanna: Multiport content addressable memory device and timing signals. NetLogic Microsystems, Blakely Sokoloff Taylor & Zafman, March 6, 2001: US06199140 (76 worldwide citation)

A content addressable memory (CAM) device. The CAM device is a synchronous device that may perform all of the following operations all in one clock cycle: (1) receive comparand data from a comparand bus; (2) receive an instruction from an instruction bus instructing the CAM device to compare the com ...


7
Bindiganavale S Nataraj, Nilesh A Gharia, Rupesh R Roy, Jose P Pereira, Varadarajan Srinivasan, Sandeep Khanna, Hok F Wong: Content addressable memory with programmable word width and programmable priority. NetLogic Microsystems, Shemwell Gregory & Courtney, August 23, 2005: US06934795 (47 worldwide citation)

A content addressable memory (CAM) device including a CAM array and a priority index table. The CAM array has a plurality of rows of CAM cells, each row including a plurality of row segments and being adapted to store a data word that spans a selectable number of the row segments. The priority index ...


8
Bindiganavale S Nataraj, Sandeep Khanna, Varadarajan Srinivasan: Method and apparatus for determining a longest prefix match in a segmented content addressable memory device. Netlogic Microsystems, Blakely Sokoloff Taylor & Zafman, December 24, 2002: US06499081 (47 worldwide citation)

A method and apparatus for determining a longest prefix match in a segmented content addressable memory (CAM) device. The CAM device includes multiple CAM array blocks that each may be arbitrarily loaded with CIDR addresses. For one embodiment, each CAM array is a ternary CAM array that includes CAM ...


9
Varadarajan Srinivasan, Bindiganavale S Nataraj, Sandeep Khanna: Method and apparatus for implementing a learn instruction in a depth cascaded content addressable memory system. NetLogic Microsystems, Blakely Sokoloff Taylor & Zafman, May 29, 2001: US06240485 (44 worldwide citation)

A method and apparatus for implementing a LEARN instruction in a depth cascaded content address memory (CAM) system. Each CAM device in the CAM system may include a CAM array, an input coupled to the CAM array and configured to receive comparand data to be compared with data stored in the CAM array, ...


10
Varadarajan Srinivasan, Sandeep Khanna, Sanjay V Gala, Ketan K Mehta: Content addressable memory multiple match detection circuit. Quality Semiconductor, Pennie & Edmonds, December 22, 1998: US05852569 (44 worldwide citation)

A circuit and a method for detecting the presence of multiple active match lines in a content addressable memory is disclosed. The circuit includes at least one bus group for expressing a unary-encoded address portion of an active match line and, for each match line, an encoding circuit capable of a ...