1
Jian Chen, Yuan Tang, Scott Luning, Salvatore F Cagnina: Method of making flash EEPROM memory with reduced column leakage current. Advanced Micro Devices, Michael A Lechter, January 9, 1996: US05482881 (18 worldwide citation)

A flash EEPROM having reduced column leakage current suitably includes cells with more uniform erase times arranged in an array. An intermediate n+ implant immediately following the DDI implant step suitably provides an enhanced doping profile in the tunneling region, which increases the rate at whi ...


2
Jian Chen, Yuan Tang, Scott Luning, Salvatore F Cagnina: Flash EEPROM memory with reduced column leakage current. Advanced Micro Devices, James H Phillips, Michael A Lechter, July 29, 1997: US05652447 (11 worldwide citation)

A flash EEPROM having reduced column leakage current suitably includes cells with more uniform erase times arranged in an array. An intermediate n+ implant immediately following the DDI implant step suitably provides an enhanced doping profile in the tunneling region, which increases the rate at whi ...


3
Salvatore F Cagnina, Hao Fang, John Jianshi Wang, Kent Kuohua Chang, Masaatzi Higashitani: High yield performance semiconductor process flow for NAND flash memory products. Advanced Micro Devices, Amin & Turocy, March 26, 2002: US06362049 (11 worldwide citation)

A semiconductor process for fabricating NAND type flash memory devices in a first embodiment includes step which can be performed on a production line which manufactures NOR type flash memory products. A NAND flash memory fabrication process according to a second embodiment simplifies the process an ...