1
Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J: Passive elements in mram embedded integrated circuits. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, KING Robert L, March 8, 2007: WO/2007/027381 (108 worldwide citation)

An integrated circuit device (300) comprises a substrate (301) and MRAM architecture (314) formed on the substrate (308). The MRAM architecture (314) includes a MRAM circuit (318) formed on the substrate (301); and a MRAM cell (316) coupled to and formed above the MRAM circuit (318). Additionally a ...


2
Hansen John P, Salter Eric J: An analog functional module using magnetoresistive memory technology. Motorola, August 6, 2003: EP1332498-A2 (1 worldwide citation)

One or more multi-state magnetoresisitive memory elements (MRMEs) are used as the primary building block for various analog functional components implemented in corresponding analog functional modules. The MRMEs are configured into a memory array to create a programmable resistive element, a program ...


3
Engel Bradley N, Salter Eric J, Slaughter Jon M: Method of writing to a multi-state magnetic random access memory cell. Freescale Semiconductor, May 31, 2006: EP1661139-A2

A method to switch a scalable magnetoresistive memory cell including the steps of providing a magnetoresistive memory device (12) having two bits (18) and (20) sandwiched between a word line (14) and a digit line (16) so that current waveforms (104) and (106) can be applied to the word and digit lin ...


4
Grynkewich Gregory W, Chung Young Sir, Baird Robert W, Durlam Mark A, Salter Eric J: Mram embedded smart power integrated circuits. Freescale Semiconductor, mude jun huangqi hang, August 6, 2008: CN200680022985

An integrated circuit device (300) includes a magnetic random access memory (MRAM) architecture and a smart power integrated circuit architecture formed on the same substrate (302) using the same fabrication process technology. The fabrication process technology is a modular process having a front e ...


5
Engel Bradley N, Salter Eric J, Slaughter Jon M: Method of writing to a multi-state magnetic random access memory cell. Freescale Semiconductor, Engel Bradley N, Salter Eric J, Slaughter Jon M, KING Robert L, March 17, 2005: WO/2005/024905

A method to switch a scalable magnetoresistive memory cell including the steps of providing a magnetoresistive memory device (12) having two bits (18, 20) sandwiched between a word line (14) and a digit line (16) so that current waveforms (104, 106) can be applied to the word and digit lines at vari ...


6
Hansen John P, Salter Eric J: An analog functional module using magnetoresistive memory technology. Motorola, KOCH William E, April 11, 2002: WO/2002/029819

One or more multi-state magnetoresisitive memory elements (MRMEs) (113) are used as the primary building block for various analog functional components implemented in corresponding analog functional modules. The MRMEs (113) are configured into a memory array to create a programmable resistive elemen ...


7
Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, Zuo Jiang Kai: Magnetic tunnel junction current sensors. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, Zuo Jiang Kai, KING Robert L, May 10, 2007: WO/2007/053340

An integrated circuit device (600) is provided which includes an active circuit component (604, 804) and a current sensor (602, 802). The active circuit component (604, 804) may be coupled between a first conductive layer (206) and a second conductive layer (210), and is configured to produce a firs ...


8
Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J: Mram embedded smart power integrated circuits. Freescale Semiconductor, Chung Young Sir, Baird Robert W, Durlam Mark A, Grynkewich Gregory W, Salter Eric J, KING Robert L, January 11, 2007: WO/2007/005303

An integrated circuit device (300) includes a magnetic random access memory ('MRAM') architecture and a smart power integrat circuit architecture formed on the same substrate (302) using the same fabrication process technology The fabrication process technology is a modular process having a front en ...


9
Salter Eric J, Deherrera Mark F, Lee Thomas H: Multi-layer source/drain stressor. Freescale Semiconductor, Salter Eric J, Deherrera Mark F, Lee Thomas H, KING Robert L, August 28, 2008: WO/2008/103517

A method for forming a semiconductor device (10) includes forming a recess (26) in a source region and a recess (28) in a drain region of the semiconductor device. The method further includes forming a first semiconductor material layer (32) in the recess (26) in the source region and a second semic ...


10
Engel Bradley N, Salter Eric J, Slaughter Jon M: Method of writing to a multi-state magnetic random access memory cell. Freescale Semiconductor, huang qihang mu dejun, October 4, 2006: CN200480024513

A method to switch a scalable magnetoresistive memory cell including the steps of providing a magnetoresistive memory device (12) having two bits (18) and (20) sandwiched between a word line (14) and a digit line (16) so that current waveforms (104) and (106) can be applied to the word and digit lin ...



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