1
David B Fite, John E Murray, Dwight P Manley, Michael M McKeon, Elaine H Fite, Ronald M Salett, Tryggve Fossum: Branch prediction. Digital Equipment Corporation, Arnold White & Durkee, August 25, 1992: US05142634 (188 worldwide citation)

A branch prediction is made by searching a cache memory for branch history information associated with a branch instruction. If associated information is not found in the cache, then the branch is predicted based on a predetermined branch bias for the branch instruction's opcode; otherwise, the bran ...


2
David B Fite Jr, Nicholas Ilyadis, Ronald M Salett: Distributed multi-link trunking method and apparatus. Nortel Networks, Withrow & Terranova P L L C, December 17, 2002: US06496502 (114 worldwide citation)

A method and apparatus for providing data communication between a source station having multiple connections to a first switch and a destination station having multiple connections to a second switch. A trunk identifier to each port on the first switch and each port on the second switch. A data fram ...


3
Elaine H Fite, Tryggve Fossum, William R Grundmann, Francis X McKeen, Ronald M Salett: Control of multiple functional units with parallel operation in a microcoded execution unit. Digital Equipment Corporation, Arnold White & Durkee, November 19, 1991: US05067069 (78 worldwide citation)

To increase the performance of a pipelined processor executing various classes of instructions, the classes of instructions are executed by respective functional units which are independently controlled and operated in parallel. The classes of instructions include integer instructions, floating poin ...


4
David A Webb Jr, David B Fite, Ricky C Hetherington, Francis X McKeen, Mark A Firstenberg, John E Murray, Dwight P Manley, Ronald M Salett, Tryggve Fossum: System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer. Digital Equipment Corporation, Arnold White & Durkee, January 15, 1991: US04985825 (77 worldwide citation)

A technique for processing memory access exceptions along with pre-fetched instructions in a pipelined instruction processing computer system is based upon the concept of pipelining exception information along with other parts of the instruction being executed. In response to the detection of access ...


5
David B Fite, Tryggve Fossum, William R Grundmann, Dwight P Manely, Francis X McKeen, John E Murray, Ronald M Salett, Eileen Samberg, Daniel P Stirling: Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor. Digital Equipment, Arnold White & Durkee, April 28, 1992: US05109495 (69 worldwide citation)

To execute variable-length instructions independently of instruction preprocessing, a central processing unit is provided with a set of queues in the data and control paths between an instruction unit and an execution unit. The queues include a "fork" queue, a source queue, a destination queue, and ...


6
David B Fite Jr, Nicholas Ilyadis, Ronald M Salett: Method and apparatus providing network communications between devices using frames with multiple formats. Nortel Networks Corporation, Blakely Sokoloff, Taylor & Zafman, June 26, 2001: US06252888 (49 worldwide citation)

A method and an apparatus providing data communications among network devices using tagged and untagged frame formats. In one embodiment, a virtual local area network (VLAN) is implemented using frames that may be transferred among network devices in both tagged and untagged formats. In one embodime ...


7
Richard C Beaven, Michael B Evans, Tryggve Fossum, Ricky C Hetherington, William R Grundmann, John E Murray, Ronald M Salett: Method and apparatus for detecting and correcting errors in a pipelined computer system. Digital Equipment Corporation, Arnold White & Durkee, January 1, 1991: US04982402 (45 worldwide citation)

In a multiprocessor system, an error occurring in any one of the CPUs may have an impact upon the operation of the remaining CPUs, and therefore these errors must be handled quickly. The errors are grouped into two categories: synchronous errors (those that must be corrected immediately to allow con ...


8
John E Murray, David B Fite, Mark A Firstenberg, Lawrence O Herman, Ronald M Salett: Simultaneously or sequentially decoding multiple specifiers of a variable length pipeline instruction based on detection of modified value of specifier registers. Digital Equipment Corporation, Arnold White & Durkee, November 24, 1992: US05167026 (41 worldwide citation)

In a pipeline processor, simultaneous decoding of multiple specifiers in a variable-length instruction causes a peculiar problem of an intra-instruction read conflict that occurs whenever an instruction includes an autoincrement or an autodecrement specifier which references either directly or indir ...


9
Ronald M Salett, Nicholas Ilyadis, David B Fite Jr: Stackable switch port collapse mechanism. Nortel Networks, Blakely Sokoloff Taylor & Zafman, December 3, 2002: US06490276 (34 worldwide citation)

A method and apparatus for providing data communication between stations on a network which optimizes the amount of resources required for a network switch. A first data frame is encoded with a source station identifier for the first station and a source switch identifier for the first switch. The f ...


10
A Ronald Caprio, John P Cyr, Bernard O Geaghan, Paul C Kotschenreuther, David J Schanin, Ronald M Salett: Interchangeable interface circuitry arrangements for use with a data processing system. Ronald T Reiling, Lester S Grodberg, December 3, 1985: US04556953 (31 worldwide citation)

The present disclosure is directed to an arrangement whereby any one of a plurality of different or similar interface circuit cards can be located into any one of a number of slots or holding means of a data processing system, without preassignment thereto, and whereby each of the interface circuit ...