1
Dave Goh, Paul Chou, Leena Sansguiri, Ronald Kroesen, Nandakumar Natarajan, John A Dilley, Marcos Frid, Robert H Hyerle, Arne Luhrs, Chandrasekar Venkatraman: Integrated LAN controller and web server chip. Agilent Technologies, April 16, 2002: US06373841 (105 worldwide citation)

A chip for a device such as a computer includes a media access controller and an embedded processor. The embedded processor is programmed to function as a web server and provide network manageability information to a network manager. The embedded processor is also programmed to function as a LAN con ...


2
Janos Kovacs, Ronald Kroesen, Kevin McCall: Dynamic phase selector phase locked loop circuit. Analog Devices, Iandiorio & Teska, July 8, 1997: US05646968 (34 worldwide citation)

A dynamic phase selector phase locked loop circuit includes: an A/D converter for receiving an input to be sampled; a phase detection circuit for determining the phase error between the input signal and a clock signal; a clock circuit, responsive to the phase detection circuit, for providing the clo ...


3
Janos Kovacs, Ronald Kroesen: Hybrid phase locked loop. Analog Devices, Iandiorio & Teska, February 27, 1996: US05495512 (29 worldwide citation)

A phase locked loop system or other second order feedback system whose natural frequency scales with its output and whose damping factor remains constant includes a filter circuit having a scaling channel for scaling the error, an integrating channel for integrating the error, and a summing circuit ...


4
Janos Kovacs, Ronald Kroesen: Center frequency controlled phase locked loop system. Analog Devices, Joseph S Iandiorio, Kirk Iandiorio & Teska Teska, May 9, 1995: US05414390 (21 worldwide citation)

A center frequency controlled phase locked loop system includes a primary phase locked loop having a first voltage controlled oscillator including a first voltage to current converter whose output current drives a first current controlled oscillator to produce the primary clock signal to be locked o ...


5
Janos Kovacs, Ronald Kroesen, Philip Quinlan: Read system for implementing PR4 and higher order PRML signals. Analog Devices, Iandiorio & Teska, June 16, 1998: US05768320 (12 worldwide citation)

A read system for implementing PR4 and higher order PRML signals includes: a continuous time programmable filter, for receiving a read signal representative of a binary signal from a storage medium and for shaping the read signal into a PR4 shaped read signal; an analog finite impulse response (AFIR ...


6
Janos Kovacs, Ronald Kroesen, Jason Byrne: Burst error limiting symbol detector system. STMicroelectronics, Brian J Colandreo, Theodore E Galanthay, Lisa K Jorgenson, May 23, 2000: US06067655 (2 worldwide citation)

A burst error limiting symbol detector system includes a symbol detector circuit responsive to a truncated sample signal for detecting binary symbols encoded in a truncated sample signal with reference to at least one preselected reference level; a feedback equalizer circuit for providing a feedback ...