1
Shafidul Islam, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Advanced Interconnect Technologies, White & Case, November 2, 2004: US06812552 (180 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so t ...


2
Timothy Leung, Mary Jean Bajacan Ramos, Gan Kian Yeow, Kyaw Ko Lwin, Romarico Santos San Antonio, Anang Subagio: Method of making thermally enhanced substrate-base package. Unisem, Wiggin and Dana, June 22, 2010: US07741158 (55 worldwide citation)

An array-type package encasing one or more semiconductor devices. The package includes a dielectric substrate having opposing first and second sides with a plurality of electrically conductive vias and a centrally disposed aperture extending from the first side to the second side. A heat slug has a ...


3
Mary Jean Ramos, Anang Subagio, Lynn Simporios Guirit, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Unisem, White & Case, September 7, 2010: US07790500 (50 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging lead-count, wherein the method lends itself to better automation of the manufacturing line and improved quality and reliability of the packages produced therefrom. A major portion of the manuf ...


4
Shafidul Islam, Romarico Santos San Antonio, Anang Subagio: Die pad for semiconductor packages and methods of making and using same. Advanced Interconnect Technologies, Wiggin and Dana, Gregory S Rosenblatt, August 28, 2007: US07262491 (40 worldwide citation)

A semiconductor device package comprising a semiconductor device and an electrically conductive lead frame at least partially covered by a molding compound. The electrically conductive lead frame includes a plurality of leads disposed proximate a perimeter of the package and a die pad disposed in a ...


5
Shafidul Islam, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Advanced Interconnect Technologies, White & Case, October 31, 2006: US07129116 (25 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so t ...


6
Shafidul Islam, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Advanced Interconnect Technologies, White & Case, August 17, 2004: US06777265 (23 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so t ...


7
Mary Jean Ramos, Romarico Santos San Antonio, Anang Subagio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Unisem, White & Case, September 21, 2010: US07799611 (22 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is disclosed, wherein the method lends itself to better automation of the manufacturing line as well as to improving the quality and reliability of the packages produced ther ...


8
Shafidul Islam, Romarico Santos San Antonio: Partially patterned lead frames and methods of making and using the same in semiconductor packaging. Unisem, White & Case, November 24, 2009: US07622332 (22 worldwide citation)

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so t ...


9
Romarico Santos San Antonio, Anang Subagio, Glenn Macaraeg, Mary Jean Bajacan Ramos: Method of making flip-chip package with underfill. Unisem, Wiggin and Dana, April 20, 2010: US07700414 (9 worldwide citation)

A method for the manufacture of a package to encapsulate at least one integrated circuit device includes the steps of: (1) providing a dielectric substrate having a first plurality of bond pads formed on a first side thereof and at least one aperture; (2) electrically interconnecting the integrated ...


10
Shafidul Islam, Romarico Santos San Antonio, Anang Subagio: Lead frame routed chip pads for semiconductor packages. Unisem, Wiggin and Dana, September 14, 2010: US07795710 (8 worldwide citation)

A redistributed lead frame for use in molded plastic semiconductor package (38) is formed from an electrically conductive substrate by a sequential metal removal process. The process includes: (a) patterning a first side of an electrically conductive substrate to form an array of lands separated by ...