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Roger A Booth Jr, Douglas D Coolbaugh, Ebenezer E Eshun, Zhong Xiang He: Interdigitated vertical parallel capacitor. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Katherine S Brown, February 19, 2013: US08378450 (4 worldwide citation)

An interdigitated structure may include at least one first metal line, at least one second metal line parallel to the at least one first metal line and separated from the at least one first metal line, and a third metal line contacting ends of the at least one first metal line and separated from the ...


2
Roger A Booth Jr, Kangguo Cheng, Jack A Mandelman: Tunneling effect transistor with self-aligned gate. International Business Machines Corporation, Scully Scott Murphy & Presser P C, H Daniel Schnumann, April 20, 2010: US07700466 (94 worldwide citation)

In one embodiment, a mandrel and an outer dummy spacer may be employed to form a first conductivity type region. The mandrel is removed to form a recessed region wherein a second conductivity type region is formed. In another embodiment, a mandrel is removed from within shallow trench isolation to f ...


3
Roger A Booth Jr, MaryJane Brodsky, Kangguo Cheng, Chengwen Pei: Shallow trench capacitor compatible with high-K / metal gate. International Business Machines Corporation, Joseph P Abate, Howard M Cohn, January 25, 2011: US07875919 (15 worldwide citation)

Forming a shallow trench capacitor in conjunction with an FET by forming a plurality of STI trenches; for the FET, implanting a first cell well having a first polarity between a first and a second of the STI trenches; for the capacitor, implanting a second cell well having a second polarity in an ar ...


4
Roger A Booth Jr, MaryJane Brodsky, Kangguo Cheng, Chengwen Pei: Embedded trench capacitor having a high-k node dielectric and a metallic inner electrode. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Yuanmin Cai, March 2, 2010: US07671394 (14 worldwide citation)

A deep trench is formed in a semiconductor substrate and a pad layer thereupon, and filled with a dummy node dielectric and a dummy trench fill. A shallow trench isolation structure is formed in the semiconductor substrate. A dummy gate structure is formed in a device region after removal of the pad ...


5
Roger A Booth Jr, Kangguo Cheng, Jack A Mandelman: FinFET with top body contact. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Joseph P Abate Esq, June 23, 2009: US07550773 (14 worldwide citation)

FinFETs are provided with a body contact on a top surface of a semiconductor fin. The top body contact may be self-aligned with respect to the semiconductor fin and the source and drain regions. Alternately, the source and drain regions may be formed recessed from the top surface of the semiconducto ...


6
Roger A Booth Jr, Kangguo Cheng, Toshiharu Furukawa, Chengwen Pei: Integrated circuit with finFETs and MIM fin capacitor. International Business Machines Corporation, David Cain, Roberts Mlotkowski Safran & Cole P C, April 16, 2013: US08420476 (12 worldwide citation)

An integrated circuit having finFETs and a metal-insulator-metal (MIM) fin capacitor and methods of manufacture are disclosed. A method includes forming a first finFET comprising a first dielectric and a first conductor; forming a second finFET comprising a second dielectric and a second conductor; ...


7
Roger A Booth Jr, Kangguo Cheng, Chandrasekharan Kothandaraman: Fin anti-fuse with reduced programming voltage. International Business Machines Corporation, Gibb I P Law Firm, October 4, 2011: US08030736 (12 worldwide citation)

A method forms an anti-fuse structure comprises a plurality of parallel conductive fins positioned on a substrate, each of the fins has a first end and a second end. A second electrical conductor is electrically connected to the second end of the fins. An insulator covers the first end of the fins a ...


8
Roger A Booth Jr, Kangguo Cheng, Jack A Mandelman, William R Tonti: Electrically programmable π-shaped fuse structures and methods of fabrication thereof. International Business Machines Corporation, Heslin Rothenberg Farley & Mesiti PC, October 30, 2007: US07288804 (10 worldwide citation)

Electrically programmable fuse structures for an integrated circuit and methods of fabrication thereof are presented, wherein the electrically programmable fuse has a first terminal portion and a second terminal portion interconnected by a fuse element. The first terminal portion and the second term ...


9
Roger A Booth Jr, Kangguo Cheng, Jack A Mandelman, William R Tonti: Trench anti-fuse structures for a programmable integrated circuit. International Business Machines Corporation, Wood Herron & Evans, July 12, 2011: US07977766 (8 worldwide citation)

Trench anti-fuse structures, design structures embodied in a machine readable medium for designing, manufacturing, or testing a programmable integrated circuit. The anti-fuse structure includes a trench having a plurality of sidewalls that extend into a substrate, a doped region in the semiconductor ...


10
Roger A Booth Jr, Kangguo Cheng, Bruce B Doris, Ghavam G Shahidi: Method and structure for forming high performance MOS capacitor along with fully depleted semiconductor on insulator devices on the same chip. International Business Machines Corporation, Scully Scott Murphy & Presser P C, Daniel P Morris Esq, August 20, 2013: US08513723 (7 worldwide citation)

An integrated circuit is provided that includes a fully depleted semiconductor device and a capacitor present on a semiconductor on insulator (SOI) substrate. The fully depleted semiconductor device may be a finFET semiconductor device or a planar semiconductor device. In one embodiment, the integra ...



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