1
Ashok Challa, Alan Elbanhawy, Dean E Probst, Steven P Sapp, Peter H Wilson, Babak S Sani, Becky Losee, Robert Herrick, James J Murphy, Gordon K Madson, Bruce D Marchant, Christopher B Kocon, Debra S Woolsey: Methods of making power semiconductor devices with thick bottom oxide layer. Fairchild Semiconductor Corporation, Kilpatrick Townsend & Stockton, March 27, 2012: US08143124 (110 worldwide citation)

A method of manufacturing a semiconductor device having a charge control trench and an active control trench with a thick oxide bottom includes forming a drift region, a well region extending above the drift region, an active trench extending through the well region and into the drift region, a char ...


2
Robert Herrick, Becky Losee, Dean Probst: Structure and method for forming a trench MOSFET having self-aligned features. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, July 12, 2005: US06916745 (63 worldwide citation)

In accordance with an embodiment of the present invention, a semiconductor device is formed as follows. An exposed surface area of a silicon layer where silicon can be removed is defined. A portion of the silicon layer is removed to form a middle section of a trench extending into the silicon layer ...


3
Duc Chau, Becky Losee, Bruce Marchant, Dean Probst, Robert Herrick, James Murphy: Self-aligned trench MOSFETs and methods for making the same. Fairchild Semiconductor Corporation, Kenneth E Horton, Kirton & McConkie, July 18, 2006: US07078296 (49 worldwide citation)

Self-aligned trench MOSFETs and methods for manufacturing the same are disclosed. By having a self-aligned structure, the number of MOSFETS per unit area—the cell density—is increased, making the MOSFETs cheaper to produce. The self-aligned structure for the MOSFET is provided by making the sidewall ...


4
Robert Herrick, Dean Probst, Fred Session: Shielded gate field effect transistor with improved inter-poly dielectric. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, June 10, 2008: US07385248 (44 worldwide citation)

A field effect transistor (FET) includes a trench extending into a silicon region of a first conductive type. A shield insulated from the silicon region by a shield dielectric extends in a lower portion of the trench. A gate electrode is in the trench over but insulated from the shield electrode by ...


5
James Dell Milner, Robert Herrick Collins, James Grant Lee, David Allen Palzewicz: Method of and apparatus for separating discrete elements from pre-perforated web for placement on product web moving at different speed. Kimberly-Clark Worldwide, Thomas D Wilhelm, Wilhelm Law Service, February 25, 2003: US06523595 (42 worldwide citation)

A method and apparatus are provided for separating a discrete element from a first substrate web, moving at a first speed, and placing the discrete element on a second substrate web, moving at a second speed. The apparatus includes a first station, wherein perforations are made in the first substrat ...


6
Robert Herrick, Becky Losee, Dean Probst: Method for forming a trench MOSFET having self-aligned features. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, March 18, 2008: US07344943 (38 worldwide citation)

A semiconductor device is formed as follows. A plurality of trenches is formed in a silicon layer. An insulating layer filling an upper portion of each trench is formed. Exposed silicon is removed from adjacent the trenches to expose an edge of the insulating layer in each trench, such that the expo ...


7
Robert Herrick, Dean Probst, Fred Session: Method for forming inter-poly dielectric in shielded gate field effect transistor. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, October 6, 2009: US07598144 (24 worldwide citation)

A method of forming shielded gate trench FET includes the following steps. A trench is formed in a silicon region of a first conductivity type. A shield electrode is formed in a bottom portion of the trench. An inter-poly dielectric (IPD) including a layer of thermal oxide and a layer of conformal d ...


8
Robert Herrick, Becky Losee, Dean Probst: Power device with trenches having wider upper portion than lower portion. Fairchild Semiconductor Corporation, Townsend and Townsend and Crew, September 29, 2009: US07595524 (21 worldwide citation)

A field effect transistor includes a plurality of trenches extending into a silicon layer. Each trench has upper sidewalls that fan out. Contact openings extend into the silicon layer between adjacent trenches such that each trench and an adjacent contact opening form a common upper sidewall portion ...


9
Lilley G C, Kolb Robert Herrick: Method and apparatus for determining the volumetric average of a parameter. Shell Oil Company, July 18, 1972: US3678257 (8 worldwide citation)

The volumetric average of a parameter is determined by measuring volumetric increments of fluid passing through a conduit and producing a signal indicative of the value of the parameter only upon completion of a volume increment. The signal is summed. The summed signal is proportional to volume time ...


10
James Dell Milner, Robert Herrick Collins, James Grant Lee, David Allen Palzewicz: Method of separating and placing discrete elements. Kimberly-Clark Worldwide, July 29, 2003: US06599384 (8 worldwide citation)

A method and apparatus are provided for separating a discrete element from a first substrate web, moving at a first speed, and placing the discrete element on a second substrate web, moving at a second speed. The apparatus includes a first station, wherein perforations are made in the first substrat ...