1
Eliyahou Harari, Robert D Norman, Sanjay Mehrotra: Flash eeprom system. SunDisk Corporation, Majestic Parsons Siebert & Hsue, March 22, 1994: US05297148 (524 worldwide citation)

A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected c ...


2
Karl M J Lofgren, Robert D Norman, Gregory B Thelin, Anil Gupta: Wear leveling techniques for flash EEPROM systems. Sandisk Corporation, May 8, 2001: US06230233 (507 worldwide citation)

A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend th ...


3
Daniel L Auclair, Jeffrey Craig, John S Mangan, Robert D Norman, Daniel C Guterman, Sanjay Mehrotra: Soft errors handling in EEPROM devices. SanDisk Corporation, Majestic Parsons Siebert & Hsue, August 12, 1997: US05657332 (492 worldwide citation)

Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulativ ...


4
Eliyahou Harari, Robert D Norman, Sanjay Mehrotra: Flash EEprom system. SanDisk Corporation, Majestic Parsons Siebert & Hsue, February 11, 1997: US05602987 (459 worldwide citation)

A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected c ...


5
Robert D Norman, Karl M J Lofgren, Jeffrey D Stai, Anil Gupta, Sanjay Mehrotra: Solid state memory system including plural memory chips and a serialized bus. Sundisk Corporation, Majestic Parsons Siebert & Hsue, July 4, 1995: US05430859 (450 worldwide citation)

A memory system includes an array of solid-state memory devices which are in communication with and under the control of a controller module via a device bus with very few lines. This forms an integrated-circuit mass storage system which is contemplated to replace a mass storage system such as a dis ...


6
Daniel L Auclair, Jeffrey Craig, John S Mangan, Robert D Norman, Daniel C Guterman, Sanjay Mehrotra: Soft errors handling in EEPROM devices. SanDisk Corporation, Majestic Parsons Siebert & Hsue, July 2, 1996: US05532962 (400 worldwide citation)

Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulativ ...


7
Eliyahou Harari, Robert D Norman, Sanjay Mehrotra: Flash EEPROM system with erase sector select. Sundisk Corporation, Majestic Parsons Siebert & Hsue, May 23, 1995: US05418752 (380 worldwide citation)

A system of Flash EEprom memory chips with controlling circuits serves as non-volatile memory such as that provided by magnetic disk drives. Improvements include selective multiple sector erase, in which any combinations of Flash sectors may be erased together. Selective sectors among the selected c ...


8
Stephen Gross, Robert D Norman: Device and method for defect handling in semi-conductor memory. SunDisk Corporation, Majestic Parsons Siebert & Hsue, April 6, 1993: US05200959 (378 worldwide citation)

A solid-state memory array such as an electrically erasable programmable read only memory (EEprom) or Flash EEprom array is used to store sequential data in a prescribed order. The memory includes a first information list containing addresses and defect types of previously detected defects. The defe ...


9
Robert F Wallace, Robert D Norman, Eliyahou Harari: Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems. Sandisk Corporation, Majestic Parsons Siebert & Hsue, September 2, 1997: US05663901 (360 worldwide citation)

A very small computer memory card is densely packed with a large number of flash EEPROM integrated circuit chips. A computer memory system provides for the ability to removably connect one or more of such cards with a common controller circuit that interfaces between the memory cards and a standard ...


10
Karl M J Lofgren, Robert D Norman, Gregory B Thelin, Anil Gupta: Wear leveling techniques for flash EEPROM systems. Western Digital Corporation, SanDisk Corporation, Majestic Parsons Siebert & Hsue, June 27, 2000: US06081447 (339 worldwide citation)

A mass storage system made of flash electrically erasable and programmable read only memory ("EEPROM") cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend th ...