1
Sachin Satish Idgunji, David Walter Flynn, Robert Campbell Aitken: Virtual power rail modulation within an integrated circuit. ARM, Nixon & Vanderhye P C, June 15, 2010: US07737720 (24 worldwide citation)

An integrated circuit is provided with logic blocks which draw their power from virtual supply rails. These virtual supply rails are connected by switch blocks to main supply rails. The switch blocks are subject to modulation to maintain the virtual supply rails at an intermediate voltage level such ...


2
Azeez Bhavnagarwala, Robert Campbell Aitken, Lucian Shifren: Method, system and device for complementary non-volatile memory device operation. ARM, Berkeley Law & Technology Group, March 7, 2017: US09589636 (22 worldwide citation)

Disclosed are methods, systems and devices for operation of dual non-volatile memory devices. In one aspect, a pair of non-volatile memory device coupled in series may be placed in complementary memory states any one of multiple memory states in a write operation by controlling a current and a volta ...


3
Robert Campbell Aitken, Lucian Shifren: Method, system and device for non-volatile memory device operation. ARM, Berkeley Law & Technology Group, January 31, 2017: US09558819 (20 worldwide citation)

Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device. ...


4
Sachin Satish Idgunji, Robert Campbell Aitken, Imran Iqbal: Sequential latching device with elements to increase hold times on the diagnostic data path. ARM, Nixon & Vanderhye P C, May 6, 2014: US08717078 (10 worldwide citation)

A latching device includes input and output latching elements to receive and output data values wherein the input and output elements are configured to receive a first and second clocks, respectively. The clocks have the same frequency but are inverted. The elements are transparent and transmit data ...


5
Vikas Chandra, Robert Campbell Aitken: Method of altering distribution of a chosen characteristic of a plurality of memory cells forming a memory device. ARM, Nixon & Vanderhye P C, July 16, 2013: US08488369 (10 worldwide citation)

A method is provided for altering distribution of a chosen characteristic of a plurality of memory cells forming a memory device. The method comprises identifying a subset of the memory cells whose value of the chosen characteristic is within a predetermined end region of the distribution, and then ...


6
Sachin Satish Idgunji, David Walter Flynn, David William Howard, Robert Campbell Aitken: Integrated circuit power-on control and programmable comparator. ARM, Nixon & Vanderhye P C, October 20, 2009: US07605644 (6 worldwide citation)

An integrated circuit is provided with a main supply rail and a virtual supply rail connected by strong and weak header transistors. A power-on controller controls the switching on of the strong transistors after the virtual supply rail voltage has already been driven up to close to its operating le ...


7
Krisztian Flautner, Robert Campbell Aitken, Stephen John Hill: Integrated circuit with multiple layers of circuits. ARM, Nixon & Vanderhye P C, January 4, 2011: US07863733 (6 worldwide citation)

An integrated circuit 78 is formed of multiple layers of circuits 14, 16 superimposed to produce stacks of circuit blocks 2, 4. Stack control circuitry 18, 20 is associated with the input and output signals from the circuit blocks to direct these to/from the currently active circuit block(s) as appr ...


8
Robert Campbell Aitken, Gary Robert Waggoner: Integrated circuit and method for testing memory on the integrated circuit. ARM, Nixon & Vanderhye P C, March 27, 2012: US08145958 (5 worldwide citation)

An integrated circuit and method for testing memory on the integrated circuit are provided. The integrated circuit has processing logic for performing data processing operations on data, and a plurality of memory units for storing data for access by the processing logic. Further, memory test logic i ...


9
James Edward Myers, David Walter Flynn, Robert Campbell Aitken, Marlin Wayne Frederick Jr: Supplying a clock signal and a gated clock signal to synchronous elements. ARM, Nixon & Vanderhye P C, March 5, 2013: US08390328 (4 worldwide citation)

A clock gating circuitry is configured to receive a clock signal and to output an output signal comprising either the clock signal or the predetermined gated value. The circuitry receives a clock signal, a clock enable signal having either an enable value or a disable value, and a power mode signal ...


10
Robert Campbell Aitken, Dipesh Ishwerbhai Patel, Gary Robert Waggoner: Serial scan chain control within an integrated circuit. ARM, Nixon & Vanderhye P C, June 8, 2010: US07734974 (4 worldwide citation)

An integrated circuit 2 includes a plurality of circuit blocks 38, 40, 44 each having an associated serial scan chain loop 32, 34, 36 which extends from a converter 10, to the circuit block 38, 42, 44 in question and then back to the converter 10. Multiplexing circuitry 50, 52 associated with each s ...