1
Richard W Coyle, Zenja Chao, Thomas B Berg: Interface controller with first and second buffer storage area for receiving and transmitting data between I/O bus and high speed system bus. Wang Laboratories, Michael H Shanahan, March 26, 1991: US05003463 (57 worldwide citation)

An information processing system comprises a high speed noninterlocked system bus 12 which couples together a plurality of system units including a main memory and a system bus interface (SBI) unit 34. The system bus interface unit is further coupled to an I/O bus 42 having a plurallity of I/O Proce ...


2
Richard W Coyle, Zenja Chao, Thomas B Berg: I/O bus to system interface. Wang Laboratories, Kenneth L Kilik, November 9, 1993: US05261057 (42 worldwide citation)

An information processing system comprises a high speed noninterlocked system bus 12 which couples together a plurality of system units including a main memory and a system bus interface (SBI) unit 34. The system bus interface unit is further coupled to an I/O bus 42 having a plurality of I/O Proces ...


3
Richard F Giunta, Robert D Becker, Martin J Schwartz, Richard W Coyle, Kevin H Curcuru: Memory diagnostic apparatus and method. Wang Laboratories, Michael H Shanahan, Gordon E Nelson, July 24, 1990: US04943966 (33 worldwide citation)

A system console 30 is enabled to read registers from memory boards 12 and 14 and to set registers within the memory boards which control the disabling of one or more memory arrays 16-22. The information read from the memory boards is indicative at least of which of the memory arrays has malfunction ...


4
Edward Rasala, Steven Wallach, Carl J Alsing, Kenneth D Holberger, Charles J Holland, Thomas West, James M Guyer, Richard W Coyle, Michael L Ziegler, Michael B Druke: Data processing system. Data General Corporation, Robert F O Connell, May 31, 1983: US04386399 (25 worldwide citation)

A data processing system which handles thirty-two bit logical addresses which can be derived from either sixteen bit logical addresses or thirty-two bit logical addresses, the latter being translated into physical addresses by unique translation means. The system includes means for decoding macro-in ...