1
Gilbert Neiger, Stephen Chou, Erik Cota Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig, Sebastian Schoenberg: Virtual translation lookaside buffer. Intel Corporation, Blakely Sokoloff Taylor & Zafman, June 14, 2005: US06907600 (135 worldwide citation)

In one embodiment, a method for supporting address translation in a virtual-machine environment includes creating a guest translation data structure to be used by a guest operating system for address translation operations, creating an active translation data structure based on the guest translation ...


2
Ernie F Brickell, Clifford D Hall, Joseph F Cihula, Richard Uhlig: Method of improving computer security through sandboxing. Intel Corporation, Steven Skabrat, March 15, 2011: US07908653 (94 worldwide citation)

Improving security of a processing system may be accomplished by at least one of executing and accessing a suspect file in a sandbox virtual machine.


3
Erik Cota Robles, Sebastian Schoenberg, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Gilbert Neiger, Richard Uhlig: Tracking operating system process and thread execution and virtual machine execution in hardware or in a virtual machine monitor. Intel Corporation, Thomas R Lane, March 13, 2007: US07191440 (79 worldwide citation)

Transitions among schedulable entities executing in a computer system are tracked in computer hardware or in a virtual machine monitor. In one aspect, the schedulable entities are operating system processes and threads, virtual machines, and instruction streams executing on the hardware. In another ...


4
Michael Kozuch, Stephen Chou, Erik Cota Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger, Sebastian Schoenberg, Richard Uhlig: Mechanism for providing power management through virtualization. Intel Corporation, Derek J Reynolds, May 29, 2007: US07225441 (60 worldwide citation)

In one embodiment, a method for providing power management via virtualization includes monitoring the utilization of a host platform device by one or more virtual machines and managing power consumption of the host platform device based on the results of monitoring.


5
Ioannis Schoinas, Rajesh Madukkarumukumana, Gilbert Neiger, Richard Uhlig, Balaji Vembu: Caching support for direct memory access address translation. Intel Corporation, Philip A Pedigo, February 19, 2008: US07334107 (49 worldwide citation)

An embodiment of the present invention is a technique to provide cache support for direct memory access address translation. A cache structure stores cached entries used in address translation of a guest physical address to a host physical address. The guest physical address corresponds to a guest d ...


6
Ioannis Schoinas, Rajesh Madukkarumakumana, Gilbert Neiger, Richard Uhlig, Ku jei King: Address translation for input/output devices using hierarchical translation tables. Intel Corporation, Grossman Tucker Perreault & Pfleger PLLC, October 28, 2008: US07444493 (44 worldwide citation)

An embodiment of the present invention is a technique to perform address translation. A table structure is indexed by a source identifier of an input/output (I/O) transaction specifying a guest physical address and requested by an I/O device to map the I/O device to a domain assigned to the I/O devi ...


7
Rajesh Madukkarumukumana, Ioannis Schoinas, Ku jei King, Balaji Vembu, Gilbert Neiger, Richard Uhlig: Fault processing for direct memory access address translation. Intel Corporation, Philip A Pedigo, March 4, 2008: US07340582 (41 worldwide citation)

An embodiment of the present invention is a technique to process faults in a direct memory access address translation. A register set stores global control or status information for fault processing of a fault generated by an input/output (I/O) transaction requested by an I/O device. An address tran ...


8
Andrew V Anderson, Steven M Bennett, Erik Cota Robles, Alain K├Ągi, Gilbert Neiger, Rajesh S Madukkarumukumana, Sebastian Schoenberg, Richard Uhlig, Michael A Rothman, Vincent J Zimmer, Stalinselvaraj Jeyasingh: System and method to deprivilege components of a virtual machine monitor. Intel Corporation, Hanley Flight & Zimmerman, July 13, 2010: US07757231 (39 worldwide citation)

In some embodiments, the invention involves a system to deprivilege components of a virtual machine monitor and enable deprivileged service virtual machines (SVMs) to handle selected trapped events. An embodiment of the invention is a hybrid VMM operating on a platform with hardware virtualization s ...


9
Erik Cota Robles, Stephen Chou, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Gilbert Neiger, Richard Uhlig: Method and apparatus for constructing host processor soft devices independent of the host processor operating system. Intel Corporation, Blakely Sokoloff Taylor & Zafman, September 18, 2007: US07272831 (34 worldwide citation)

A method and apparatus for constructing host processor soft devices independent of the host processor operating system are provided. In one embodiment, a driver of a soft device is implemented in a virtual machine monitor (VMM), and the soft device is made available for use by one or more virtual ma ...


10
Gilbert Neiger, Stephen Chou, Erik Cota Robles, Stalinselvaraj Jeyasingh, Alain Kagi, Michael Kozuch, Richard Uhlig: Processor mode for limiting the operation of guest software running on a virtual machine supported by a virtual machine monitor. Intel Corporation, Thomas R Lane, October 19, 2010: US07818808 (30 worldwide citation)

In one embodiment, a processor mode is provided for guest software. The processor mode enables the guest software to operate at a privilege level intended by the guest software. When the guest software attempts to perform an operation restricted by the processor mode, the processor mode is exited to ...