1
Frederick O Flusche, Richard N Gustafson, Bruce L McGilvray: Cache storage line shareability control for a multiprocessor system. International Business Machines Corporation, Bernard M Goldman, July 19, 1983: US04394731 (91 worldwide citation)

A multiprocessor (MP) system is described having central processors (CPs) in which each CP has a store-in-cache (SIC) with an associated processor directory (PD). Each PD has a plurality of line entries which define the content of corresponding line positions in the associated SIC. Each line entry h ...


2
Richard N Gustafson, John S Liptay, Charles F Webb: Data processor with enhanced error recovery. International Business Machines Corporation, Lynn L Augspurger, Whitham Curtis Whitham & McGinn, April 2, 1996: US05504859 (51 worldwide citation)

Error detection and recovery is provided in a processor of small size and which can be integrated on a single chip by providing buffers for both data and processor status codes in order to contain errors until a subsequent check point preferably generated at the termination of each instruction is re ...