1
Richard K Williams, Richard A Blanchard: Complementary, isolated DMOS IC technology. Siliconix Incorporated, Skjerven Morrill MacPherson Franklin & Friel, October 20, 1992: US05156989 (289 worldwide citation)

A process sequence that produces a plurality of pretransistor structures from which a variety of high voltage, isolated integrated circuits and low voltage integrated circuits are easily fabricated.


2
Richard K Williams, Wayne Grabowski, Mohamed Darwish, Jacek Korec: Trench-gated MOSFET with bidirectional voltage clamping. Siliconix incorporated, David E Steuber, Carmen C Cook, Skjerven Morrill MacPherson Franklin & Friel, April 11, 2000: US06049108 (234 worldwide citation)

The gate of a MOSFET is located in a lattice of trenches which define a plurality of cells. Most of the cells contain a MOSFET, but a selected number of the cells at predetermined locations in the lattice contain either a PN diode or a Schottky diode. The PN and Schottky diodes are connected in para ...


3
Richard K Williams, Mohammad Kasem: Vertical power mosfet having thick metal layer to reduce distributed resistance. Siliconix Incorporated, David E Steuber, Skjerven Morrill MacPherson Franklin and Friel, September 9, 1997: US05665996 (221 worldwide citation)

The on-resistance of a vertical power transistor is substantially reduced by forming a thick metal layer on top of the relatively thin metal layer that is conventionally used to make contact with the individual transistor cells in the device. The thick metal layer is preferably plated electrolessly ...


4
Richard K Williams, Mohamed Darwish, Wayne Grabowski, Michael E Cornell: Low resistance power MOSFET or other device containing silicon-germanium layer. Siliconix incorporated, David E Steuber, Skjerven Morrill MacPherson, May 29, 2001: US06239463 (180 worldwide citation)

A power MOSFET or other semiconductor device contains a layer of silicon combined with germanium to reduce the on-resistance of the device. The proportion of germanium in the layer is typically in the range of 1-40%. To achieve desired characteristics the concentration of germanium in the Si-Ge laye ...


5
Allen K Lam, Richard K Williams, Alex K Choi: Symmetrical package for semiconductor die. David E Steuber, Skjerven Morrill MacPherson, July 3, 2001: US06256200 (179 worldwide citation)

A semiconductor package contains a plurality of sheet metal leads that are attached to one or more terminals on a top side of a semiconductor die. A heat sink is attached to a terminal on a bottom side of the die. Each of the leads extends across the die and beyond opposite edges of the die and is s ...


6
Richard K Williams: Vertical power MOSFET having reduced sensitivity to variations in thickness of epitaxial layer. Siliconix incorporated, David E Steuber, Skjerven Morrill MacPherson Franklin & Friel, September 29, 1998: US05814858 (139 worldwide citation)

A vertical power MOSFET, which could be a trench-gated or planar double-diffused device, includes an N+ substrate and an overlying N-epitaxial layer. An N-type buried layer is formed in the epitaxial layer and overlaps the substrate, the buried layer having a dopant concentration which is greater th ...


7
Fwu Iuan Hshieh, Mike F Chang, Kuo In Chen, Richard K Williams, Mohamed Darwish: High density trenched DMOS transistor. Siliconix incorporated, Norman R Klivans, Skjerven Morrill MacPherson Franklin & Friel, November 18, 1997: US05689128 (135 worldwide citation)

The cell density of a trenched DMOS transistor is increased by overcoming the problem of lateral diffusion of deep P+body regions. This problem is solved in three versions. In a first version, the deep P+body region is formed using a high energy implant into a single epitaxial layer. In a second ver ...


8
Richard K Williams: High-efficiency DC/DC voltage converter including capacitive switching pre-converter and down inductive switching post-regulator. Advanced Analogic Technologies, Patentability Associates, August 17, 2010: US07777459 (123 worldwide citation)

A DC/DC converter includes a pre-converter stage, which may include a charge pump, and a post-regulator stage, which may include a Buck converter. The duty factor of the post-regulator stage is controlled by a feedback path that extends from the output terminal of the DC/DC converter to an input ter ...


9
Richard K Williams, Wayne B Grabowski: Process of manufacturing Trench gate semiconductor device having gate oxide layer with multiple thicknesses. Advanced Analogic Technologies, David E Steuber, Skjerven Morrill MacPherson, September 18, 2001: US06291298 (121 worldwide citation)

The a trench semiconductor device such as a power MOSFET the high electric field at the corner of the trench is diminished by increasing the thickness of the gate oxide layer at the bottom of the trench. Several processes for manufacturing such devices are described. In one group of processes a dire ...


10
Richard K Williams, Richard A Blanchard: Isolated DMOS IC technology. Siliconix Incorporated, David E Steuber, Skjerven Morrill MacPherson Franklin & Friel, January 16, 1996: US05485027 (120 worldwide citation)

In an integrated circuit, a wraparound isolation region capable of sustaining a high blocking voltage to a substrate encloses a variety of high voltage or low voltage device.