1
Douglas R Farrenkopf, Richard B Merrill, Samar Saha, Kevin E Brehmer, Kamesh Gadepally, Philip J Cacharelis: Semiconductor structure having two levels of buried regions. National Semiconductor Corporation, Ronald J Meetin, Skjerven Morrill MacPherson Franklin & Friel, March 30, 1999: US05889315 (157 worldwide citation)

Integrated circuits suitable for high-performance applications, especially mixed signal products that have analog and digital sections, are fabricatable from a semiconductor structure having two levels of buried regions. In a typical embodiment lower buried regions of opposite conductivity types are ...


2
Douglas R Farrenkopf, Richard B Merrill, Samar Saha, Kevin E Brehmer, Kamesh Gadepally, Philip J Cacharelis: Fabrication of semiconductor structure having two levels of buried regions. National Semiconductor Corporation, Ronald J Meetin, Skjerven Morrill MacPherson Franklin & Friel, May 4, 1999: US05899714 (128 worldwide citation)

Integrated circuits suitable for high-performance applications, especially mixed signal products that have analog and digital sections, are fabricated from a semiconductor structure in which lower buried regions of opposite conductivity types are situated along a lower semiconductor interface betwee ...


3
Richard B Merrill, Richard F Lyon: Storage pixel sensor and array with compression. Foveon, Sierra Patent Group, January 28, 2003: US06512544 (126 worldwide citation)

A storage pixel sensor disposed on a semiconductor substrate comprises a photosensor. At least one nonlinear capacitive element is coupled to the photosensor. At least one nonlinear capacitive element is arranged to have a compressive photocharge-to-voltage gain function. An amplifier has an input c ...


4
Richard B Merrill: CMOS-based, low leakage active pixel array with anti-blooming isolation. National Semiconductor Corporation, Limbach & Limbach L, March 25, 1997: US05614744 (112 worldwide citation)

An active pixel image sensor in accordance with the present invention utilizes guard rings, protective diffusions, and/or a combination of these two techniques to prevent electrons generated at the periphery of the active area from impacting upon the image sensor array. For example, an n+ guard ring ...


5
Richard B Merrill: Vertical color filter detector group and array. Foveon, Sierra Patent Group, April 27, 2004: US06727521 (70 worldwide citation)

A vertical color filter detector group according to the present invention is formed on a semiconductor substrate and comprises at least six layers of alternating p-type and n-typed doped regions. PN junctions between the layers operate as photodiodes with spectral sensitivities that depend on the ab ...


6
Richard B Merrill, Enayet U Issaq: Multi-turn, multi-level IC inductor with crossovers. National Semiconductor Corporation, Brian D Ogonowsky, Skjerven Morrill MacPherson Franklin & Friel, March 11, 1997: US05610433 (68 worldwide citation)

A high value inductor with a high Q factor is formed using integrated circuit techniques to have a plurality of layers, where each layer has formed on it two or more coils. The coils in the various layers are interconnected in series. Although the resulting inductor exhibits a relatively high resist ...


7
Richard B Merrill, Whu ming Young: High voltage charge pump using low voltage type transistors. National Semiconductor Corporation, Norman R Klivans, Skjerven Morrill MacPherson Franklin & Friel, July 28, 1998: US05786617 (62 worldwide citation)

An integrated circuit includes an N isolation buried layer underlying high density and low voltage type P channel and N channel transistors to define islands of arbitrary voltage on the substrate. Thus such transistors, which otherwise are capable only of low voltage operation, become capable of ope ...


8
Richard B Merrill: Electrostatic discharge protection for integrated circuits. National Semiconductor Corporation, Townsend and Townsend Khourie and Crew, August 24, 1993: US05239440 (61 worldwide citation)

A circuit is disclosed for protecting an integrated circuit or another circuit from damage due to electrostatic discharge. The protection circuit includes a triggering circuit and a clamping circuit. In response to an electrostatic discharge, the triggering circuit turns on the clamping circuit to c ...


9
Richard B Merrill, David C Reynolds, Doug Farrenkopf: ESD protection using npn bipolar transistor. National Semiconductor Corporation, Limbach & Limbach, January 4, 1994: US05276582 (60 worldwide citation)

A circuit for protecting an IC against electrostatic discharge includes a npn transistor having its collector connected to a first I/O pad and its emitter connected to VSS. A zener diode has its cathode connected to the first I/O pad, its anode connected both to the base of the npn transistor and to ...


10
Richard B Merrill, Richard M Turner, Carver A Mead, Richard F Lyon: Intra-pixel frame storage element, array, and electronic shutter method suitable for electronic still camera applications. Foveon, Sierra Patent Group, April 9, 2002: US06369853 (57 worldwide citation)

A storage pixel sensor disposed on a semiconductor substrate comprises a capacitive storage element having a first terminal connected to a fixed potential and a second terminal. A photodiode has an anode connected to a first potential and a cathode. A semiconductor reset switch has a first terminal ...