1
Raul Adrian Cernea, Khandker N Quader, Yan Li, Jian Chen, Yupin Fong: Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells. SanDisk Corporation, Parsons Hsue & de Runtz, August 24, 2004: US06781877 (306 worldwide citation)

Techniques of reducing erroneous readings of the apparent charge levels stored in a number of rows of memory cells on account of capacitive coupling between the cells. All pages of a first row are programmed with a first pass, followed by programming all pages of a second adjacent row with a first p ...


2
Douglas J Lee, Mehrdad Mofidi, Sanjay Mehrotra, Raul Adrian Cernea: Concurrent write of multiple chunks of data into multiple subarrays of flash EEPROM. SanDisk Corporation, Majestic Parsons Siebert & Hsue, March 30, 1999: US05890192 (282 worldwide citation)

An EEPROM system includes flash EEPROM cells organized into subarrays. Pairs of subarrays share row address decoders by sharing word lines, and individual subarrays have dedicated column address decoders and data registers. Each row decoder has an associated row address latch, and each column decode ...


3
Yan Li, Jian Chen, Raul Adrian Cernea: Operating techniques for reducing program and read disturbs of a non-volatile memory. SanDisk Corporation, Parsons Hsue & de Runtz, August 3, 2004: US06771536 (275 worldwide citation)

The present invention presents a non-volatile memory having a plurality of erase units or blocks, where each block is divided into a plurality of parts sharing the same word lines to save on the row decoder area, but which can be read or programmed independently. An exemplary embodiment is a Flash E ...


4
Shahzad Khalid, Yan Li, Raul Adrian Cernea, Mehrdad Mofidi: Non-volatile memory and method with bit line compensation dependent on neighboring operating modes. SanDisk Corporation, Parsons Hsue & de Runtz, October 18, 2005: US06956770 (197 worldwide citation)

When programming a contiguous page of memory storage units, every time a memory storage unit has reached its targeted state and is program-inhibited or locked out from further programming, it creates a perturbation on an adjacent memory storage unit still under programming. The present invention pro ...


5
Raul Adrian Cernea: Non-volatile memory with temperature-compensated data read. SanDisk Corporation, Parsons Hsue & de Runtz, May 6, 2003: US06560152 (168 worldwide citation)

A novel non-volatile memory is disclosed. The non-volatile memory includes an array of data storage cells that individually include a storage element such as a floating gate, a control gate and first and second source/drain terminals. A current source provides a current to the first source/drain ter ...


6
Raul Adrian Cernea, Douglas J Lee, Mehrdad Mofidi, Sanjay Mehrotra: Programmable power generation circuit for flash EEPROM memory systems. SanDisk Corporation, Majestic Parsons Siebert & Hsue, April 16, 1996: US05508971 (164 worldwide citation)

An flash EEPROM system functioning as a mass storage medium for a host computer includes a controller and at least one flash EEPROM memory module. The flash EEPROM memory module includes at least one flash EEPROM chip having an on-chip programmable power generation circuit including a high voltage g ...


7
Raul Adrian Cernea: Memory sensing circuit and method for low voltage operation. SanDisk Corporation, Parsons Hsue & de Runtz, May 16, 2006: US07046568 (151 worldwide citation)

A sensing module operates with a sense amplifier sensing a conduction current of a memory cell via a coupled bit line under constant voltage condition in order to minimize bit-line to bit-line coupling. The rate of discharge of a dedicated capacitor as measured by a change in the voltage drop there ...


8
Raul Adrian Cernea, Rushyah Tang, Douglas Lee, Chi Ming Wang, Daniel Guterman: Non-volatile memory with improved sensing and method therefor. SanDisk Corporation, Majestic Parsons Siebert & Hsue, March 28, 2000: US06044019 (145 worldwide citation)

Floating gate memories such as EEPROM and flash EEPROM have the memory state of a memory cell thereof determined by sensing the conduction current of the cell. Inherent noise fluctuations in the conduction current during sensing are canceled out by averaging the sensing over a predetermined period o ...


9
Raul Adrian Cernea, Yan Li: Non-volatile memory and method with reduced neighboring field errors. SanDisk Corporation, Parsons Hsue & de Runtz, January 17, 2006: US06987693 (139 worldwide citation)

A memory device and a method thereof allow programming and sensing a plurality of memory cells in parallel in order to minimize errors caused by coupling from fields of neighboring cells and to improve performance. The memory device and method have the plurality of memory cells linked by the same wo ...


10
Raul Adrian Cernea, Douglas J Lee, Mehrdad Mofidi, Sanjay Mehrotra: Programmable power generation circuit for flash EEPROM memory systems. SanDisk Corporation, Majestic Parsons Siebert & Hsue, January 7, 1997: US05592420 (138 worldwide citation)

An flash EEPROM system functioning as a mass storage medium for a host computer includes a controller and at least one flash EEPROM memory module. The flash EEPROM memory module includes at least one flash EEPROM chip having an on-chip programmable power generation circuit including a high voltage g ...