1
Randy J Koval: Conductors having a variable concentration of germanium for governing removal rates of the conductor during control gate formation. Micron Technology, Dicke Billig & Czaja PLLC, May 30, 2017: US09666449 (10 worldwide citation)

An embodiment of a method of forming a control gate includes forming a conductor having a concentration of germanium that varies with a thickness of the conductor, and removing portions of the conductor at a variable rate that is governed, at least in part, by the concentration of the germanium.


2
Randy J Koval: Self-aligned floating gate in a vertical memory structure. Intel Corporation, Alpine Technology Law Group, September 13, 2016: US09443864 (1 worldwide citation)

A memory device or electronic system may include a memory cell body extending from a substrate, a self-aligned floating gate separated from the memory cell body by a tunneling dielectric film, and a control gate separated from the self-aligned floating gate by a blocking dielectric film. The floatin ...


3
Randy J Koval: Self-aligned floating gate in a vertical memory structure. Intel Corporation, Alpine Technology Law Group, November 24, 2015: US09196625 (1 worldwide citation)

Methods for building a memory device or electronic system may include a memory cell body extending from a substrate, a self-aligned floating gate separated from the memory cell body by a tunneling dielectric film, and a control gate separated from the self-aligned floating gate by a blocking dielect ...


4
Randy J Koval, Fatma A Simsek Ege: Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling. Intel Corporation, Compass IP Law PC, August 1, 2017: US09722074

A non-volatile memory device and a method for forming the non-volatile memory device are disclosed. The memory device utilizes a local buried channel dielectric in a NAND string that reduces bulk channel leakage at the edge of the NAND string where the electric field gradient along the direction of ...


5
Randy J Koval: Self-aligned floating gate in a vertical memory structure. Intel Corporation, Compass IP Law PC, July 4, 2017: US09698022

Methods for building a memory device or electronic system may include a memory cell body extending from a substrate, a self-aligned floating gate separated from the memory cell body by a tunneling dielectric film, and a control gate separated from the self-aligned floating gate by a blocking dielect ...


6
Randy J Koval, Max F Hineman, Ronald A Weimer, Vinayak K Shamanna, Thomas M Graettinger, William R Kueber, Christopher Larsen, Alex J Schrinsky: Use of etch process post wordline definition to improve data retention in a flash memory device. Intel Corporation, Schwabe Williamson & Wyatt P C, July 14, 2015: US09082714

Embodiments of the present disclosure are directed towards use of an etch process post wordline definition to improve data retention in a flash memory device. In one embodiment, a method includes forming a plurality of wordline structures on a substrate, wherein individual wordline structures of the ...


7
Randy J Koval: Methods of forming a portion of a memory array having a conductor having a variable concentration of germanium. Micron Technology, Dicke Billig & Czaja PLLC, April 24, 2018: US09953842

An embodiment of a method of forming a portion of a memory array includes forming a conductor with a concentration of germanium that decreases with an increasing thickness of the conductor, removing a portion of the conductor at a rate governed by the concentration of germanium to form a tapered fir ...


8
Randy J Koval, Hiroyuki Sanda: Methods and apparatuses including an asymmetric assist device. Micron Technology, Schwegman Lundberg & Woessner P A, January 23, 2018: US09875801

Apparatuses and methods have been disclosed. One such apparatus includes a plurality of memory cells that can be formed at least partially surrounding a semiconductor pillar. A select device can be coupled to one end of the plurality of memory cells and at least partially surround the pillar. An asy ...


9
Hongbin Zhu, Zhenyu Lu, Gordon Haller, Jie Sun, Randy J Koval, John Hopkins: Semiconductor devices and methods of fabrication. Micron Technology, Schwegman Lundberg & Woessner P A, July 31, 2018: US10038002

Some embodiments include a semiconductor device having a stack structure including a source comprising polysilicon, an etch stop of oxide on the source, a select gate source on the etch stop, a charge storage structure over the select gate source, and a select gate drain over the charge storage stru ...


10
Randy J Koval, Fatma A Simsek Ege: Local buried channel dielectric for vertical NAND performance enhancement and vertical scaling. Intel Corporation, Alpine Technology Law Group, November 17, 2015: US09190490

A non-volatile memory device and a method for forming the non-volatile memory device are disclosed. The memory device utilizes a local buried channel dielectric in a NAND string that reduces bulk channel leakage at the edge of the NAND string where the electric field gradient along the direction of ...