1
Martin Bertele, Robert Oyrer, Rainald Sander: Circuit configuration having a semiconductor switch and a protection circuit. Infineon Technologies, Laurence A Greenberg, Werner H Stemer, Ralph E Locher, January 2, 2007: US07158359 (79 worldwide citation)

A circuit configuration has a first semiconductor switch and a first protection circuit. The protection circuit has a second semiconductor switch whose load path is connected between a control terminal and a load path terminal of the first semiconductor switch. The second semiconductor switch is swi ...


2
Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber: Circuitry for detecting a short circuit of a load in series with an FET. Siemens Aktiengesellschaft, February 4, 1992: US05086364 (30 worldwide citation)

The voltage (U.sub.DS) on a power MOSFET (1) is compared with a voltage (U.sub.V) derived from the sum of the voltages of a Zener diode (3) and the threshold voltage (U.sub.T) of a second MOSFET (5) to detect a short circuit in a load (2) in series with the power MOSFET (1). When this total voltage ...


3
Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber, Nance Paul: Circuit arrangement for controlling the load current in a power MOSFET. Siemens Aktiengellschaft, Hill Van Santen Steadman & Simpson, August 28, 1990: US04952827 (17 worldwide citation)

A circuit arrangement for controlling load current of a power MOSFET wherein the load is connected at the source terminal includes a second FET having a defined threshold voltage connected with its drain-source path inserted between the gate and source of the power MOSFET. A third FET connects the g ...


4
Rainald Sander: Power semiconductor module as H-bridge circuit and method for producing the same. Infineon Technologies Austria, Coats & Bennett P L L C, November 11, 2008: US07449778 (16 worldwide citation)

A power semiconductor module (41) as H-bridge circuit (42) has four power semiconductor chips (N1, N2, P1, P2) and a semiconductor control chip (IC). The semiconductor chips (N1, N2, P1, P2, IC) are arranged on three mutually separate large-area lead chip contact areas (43 to 45) of a lead plane (80 ...


5
Jenoe Tihanyi, Ludwig Leipold, Rainald Sander: Circuit limiting the load current of a power MOSFET. Siemens Aktiengesellschaft, Herbert L Lerner, Laurence A Greenberg, December 21, 1993: US05272399 (16 worldwide citation)

A circuit configuration for limiting current flowing through a power MOSFET includes a voltage divider being connected between drain and source terminals of the power MOSFET and having a node at which a voltage following a drain-to-source voltage of the power MOSFET drops. A control transistor has a ...


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Rainald Sander, Jenoe Tihanyi: Circuit arrangement for regulating the load current of a power MOSFET. Siemens Aktiengesellschaft, Hill Steadman & Simpson, August 12, 1997: US05656968 (14 worldwide citation)

In a circuit arrangement for regulating the load current of a power MOSFET, the drain-source voltage of the power MOSFET is imaged onto the input of a second MOSFET connected between a gate terminal and source terminal of the power MOSFET. When the input voltage exceeds the cut-off voltage, then the ...


8
Ludwig Leipold, Rainald Sander, Jenoe Tihanyi: Drive circuit for a power MOSFET with load at the source side. Siemens Aktiengesellschaft, Hill Steadman & Simpson, December 6, 1994: US05371418 (13 worldwide citation)

Power FETs having a load at the source side require a gate voltage lying above the drain voltage in order to be driven completely conductive. This can occur with a known pump circuit. In the drive circuit disclosed, the diode connected to the gate terminal of the power FET is a depletion FET whose s ...


9
Rainald Sander: Circuit arrangement having a power transistor and a drive circuit for the power transistor. Infineon Technologies, Maginot Moore & Beck, August 5, 2008: US07408398 (11 worldwide citation)

Circuit arrangement having a power transistor and a drive circuit for the power transistor The invention relates to a circuit arrangement having the following features: a power transistor (T) having a control terminal (G) and also a first and second load path terminal (D, S), the first load path ter ...


10
Rainald Sander, Chihao Xu, Josef Matthias Gantioler, Frank Auer: Half-bridge configuration. Infineon Technologies, Herbert L Lerner, Laurence A Greenberg, Werner H Stemer, July 31, 2001: US06269014 (10 worldwide citation)

In order to supply a load, e.g. an electric motor, with current bidirectionally, an H bridge configuration containing four switching transistors is used. In order to attain outstanding electrical conductivity and also thermal conductivity, a half-bridge configuration containing two transistors of op ...