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Purcell Stephen C, Le Gall Didier J, Bose Subroto: Structure and method for a multistandard video encoder/decoder.. C Cube Microsystems, February 15, 1995: EP0639032-A2 (57 worldwide citation)

A structure and a format for providing a video signal encoder under the MPEG standard are provided. In one embodiment, the video signal interface is provided with a decimator for providing input filtering for the incoming signals. In one embodiment, the central processing unit (CPU) and multiple cop ...


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Galbi David E, Purcell Stephen C, Chai Eric Chi Wang: Decoder for compressed video signals.. C Cube Microsystems, December 1, 1993: EP0572262-A2 (52 worldwide citation)

A decoder for compressed video signals comprises a central processing unit (CPU), a dynamic random access memory (DRAM) controller, a variable length code (VLC) decoder, a pixel filter and a video output unit. The microcoded CPU performs dequantization and inverse cosine transform using a pipelined ...


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Balkanski Alexandre, Purcell Stephen C, Kirkpatrick James W Jr: Data compression and decompression system and method.. C Cube Microsystems, September 18, 1991: EP0447234-A2 (23 worldwide citation)

In a digital video compression method and apparatus matrices of pixels in the RGB signal format are converted into YUV representation, including a step of selectively sampling the chrominance components. The signals are then subjected to a discrete cosine transform (DCT). A circuitry implementing th ...


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Balkanski Alexandre, Purcell Stephen C, Kirkpatrick James W Jr, Bonomi Mauro, Hsu Wen Chang: Data compression and decompression system and method.. C Cube Microsystems, September 18, 1991: EP0447203-A2 (21 worldwide citation)

In a digital video compression and decompression method and system, matrices of pixels in RGB, YUV or CMYK formats are accepted for data compression. The data are rearranged in 8x8 pixel blocks, each block being of one pixel component type. The pixel data are then subjected to a discrete cosine tran ...


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Purcell Stephen C: Structure and method for signed multiplication using large multiplier having two embedded signed multiplers. Chromatic Res, October 14, 1998: EP0870225-A1

A signed multiplier circuit (200) performs selectable multiplication operations on a first word having an upper byte and a lower byte and a second word having an upper byte and a lower byte. A first multiplier means (231, 232) generates a first product representative of the product of the upper byte ...


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Purcell Stephen C: Structure and method for shifting and reordering a plurality of data bytes. Chromatic Res, February 21, 1996: EP0697649-A2

A shifter circuit and method for simultaneously and independently shifting and reordering a plurality of data bytes. The shifter circuit includes first and second registers which each receive a plurality of data bytes. The first register is coupled to a plurality of first buses, with each of the fir ...


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Purcell Stephen C: Structure and method for signed multiplication using large multiplier having two embedded signed multiplers. Chromatic Research, sPARADICE William L III, April 17, 1997: WO/1997/014090

A signed multiplier circuit (200) performs selectable multiplication operations on a first word having an upper byte and a lower byte and a second word having an upper byte and a lower byte. A first multiplier means (231, 232) generates a first product representative of the product of the upper byte ...


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Farmwald P Michael, Purcell Stephen C, Hung Andrew C, Fogg Chad E: Method and structure for performing motion estimation using reduced precision pixel intensity values. Chromatic Research, sMacPHERSON Alan H, October 17, 1996: WO/1996/032807

A method of approximating the pixel intensity values of a current block using the pixel intensity values of a search window, wherein the precision of the number of bits used to represent the pixel intensity values is reduced. The pixel intensity values of the pixels in the current block are averaged ...


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