1
Puneet Gupta, Andrew B Kahng: Gate-length biasing for digital circuit optimization. Blaze DFM, Fenwick & West, October 21, 2008: US07441211 (218 worldwide citation)

Methods and apparatus for a gate-length biasing methodology for optimizing integrated digital circuits are described. The gate-length biasing methodology replaces a nominal gate-length of a transistor with a biased gate-length, where the biased gate-length includes a bias length that is small compar ...


2
Andrew B Kahng, Puneet Gupta, Dennis Sylvester, Jie Yang: Method for correcting a mask design layout. The Regents of the University of California, The Regents of the University of Michigan, Greer Burns & Crain, December 12, 2006: US07149999 (197 worldwide citation)

A method for performing a mask design layout resolution enhancement includes determining a level of correction for a mask design layout for a predetermined parametric yield with a minimum total correction cost. The mask design layout is corrected at a determined level of correction based on a correc ...


3
Puneet Gupta, Fook Luen Heng, Mark A Lavin: Method of IC fabrication, IC mask fabrication and program product therefor. International Business Machines Corporation, Law Office of Charles W Peterson Jr, Louis J Percello Esq, Brian P Verminski Esq, April 1, 2008: US07353492 (170 worldwide citation)

A method of forming integrated circuit (IC) chip shapes and a method and computer program product for converting an IC design to a mask, e.g., for standard cell design. Individual book/macro physical designs (layouts) are proximity corrected before unnesting and an outer proximity range is determine ...


4
Puneet Gupta, Kartik Muralidharan, Rajat Laxmichand Gogri, Kavitha Damodhiran: Providing location-based services via wireless networks. Infosys Technolologies, Klarquist Sparkman, August 31, 2010: US07787887 (111 worldwide citation)

Location-based services can be provided by broadcasting location-based information within wireless network zones. A system for providing location-based services within an ad-hoc wireless network zone can include an information server for providing the location-based services by broadcasting location ...


5
Puneet Gupta, Andrew B Kahng: Methods for gate-length biasing using annotation data. Tela Innovations, Martine Penilla Group, May 22, 2012: US08185865 (88 worldwide citation)

Methods for generating a biased layout for making an integrated circuit are disclosed. One such method includes obtaining a nominal layout defined by one or more cells, where each cell has one or more transistor gate features with a nominal gate length. Then, obtaining an annotated layout. The annot ...


6
Puneet Gupta, Andrew B Kahng, Chul Hong Park: Method and system for placing layout objects in a standard-cell layout. Tela Innovations, Martine Penilla & Gencarella, December 29, 2009: US07640522 (84 worldwide citation)

A method and system for detailed placement of layout objects in a standard-cell layout design are disclosed. Layout objects comprise cells and etch dummies. The method includes a programming based technique to calculate layout object perturbation distances for the layout objects. The method includes ...


7
Puneet Gupta, Philip Darringer, David LaMacchia, Kenneth Harrenstien: Web applications interface system in a mobile-based client-server system. Oracle Corporation, Lyon & Lyon, April 16, 2002: US06374305 (75 worldwide citation)

A mobile-based client-server system architecture incorporates two specialized software layers—a specialized “proxy” layer that resides on a mobile client station, and a “web agent” layer that resides on a server. A conventional web browser application residing on a mobile client station is configure ...


8
Puneet Gupta, Andrew Kahng, Saumil Shah: Method and system for integrated circuit optimization by using an optimized standard-cell library. Tela Innovations, Martine Penilla & Gencarella, May 11, 2010: US07716612 (21 worldwide citation)

A method and system for integrated circuit optimization to improve performance and to reduce leakage power consumption of an integrated circuit (IC). The original IC includes a plurality of nominal cells, and each of the nominal cells includes a plurality of transistors. The method creates an optimi ...


9
Puneet Gupta, Larry W Shive, Brian L Gilmore: Semiconductor wafer boat for a vertical furnace. MEMC Electronic Materials, Senniger Powers, April 25, 2006: US07033168 (21 worldwide citation)

A wafer boat for use in heat treatment of semiconductor wafers in a vertical furnace comprises support rods extending generally vertically when the wafer boat is placed in the vertical furnace. Fingers are supported by and extend along vertical extent of the support rods. Wafer holder platforms are ...


10
Puneet Gupta, Andrew Kahng, Dave Reed: Method and system for reshaping a transistor gate in an integrated circuit to achieve a target objective. Tela Innovations, Martine Penilla & Gencarella, June 1, 2010: US07730432 (17 worldwide citation)

The present invention provides a method and system for designing an integrated circuit (IC). The IC comprises a plurality of cells, and each of the cells comprises a plurality of transistors. The method achieves a target objective of a transistor, of a cell, or of part of or the entire IC. The metho ...



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