1
Peter M Kogge: Dynamic multi-mode parallel processing array. International Business Machines Corporation, Lynn L Augspurger, Andrew M Riddles, December 12, 1995: US05475856 (321 worldwide citation)

A Parallel RISC computer system is provided by a multi-mode dynamic multi-mode parallel processor array with one embodiment illustrating a tightly coupled VLSI embodiment with an architecture which can be extended to more widely placed processing elements through the interconnection network which co ...


2
Vincent J Smoral, Peter M Kogge, Phillip J Sementilli Jr: Hybrid architecture for video on demand server. Lockheed Martin Corporation, William H Steinberg, March 4, 1997: US05608448 (212 worldwide citation)

Processing requirement at each computing element in a video server for a video on demand (VOD) system are reduced to only those needed for VOD, resulting in a less expensive processor with less memory and, hence, lower cost. A hybrid video server architecture combines the best features of massive pa ...


3
Thomas N Barker, Clive A Collins, Michael C Dapp, James W Dieffenderfer, Donald G Grice, Peter M Kogge, David C Kuchinski, Billy J Knowles, Donald M Lesmeister, Richard E Miles, Richard E Nier, Eric E Retter, Robert R Richardson, David B Rolfe, Nicholas J Schoonover, Vincent J Smoral, James R Stupp, Paul A Wilkinson: Advanced parallel array processor(APAP). International Business Machines Corporation, Lynn L Augspurger, Andrew M Riddles, December 31, 1996: US05590345 (164 worldwide citation)

A computer system having a plurality of processors and memory including a plurality of scalable nodes having multiple like processor memory elements. Each of the processor memory elements has a plurality of communication paths for communication within a node to other like processor memory elements w ...


4
Peter M Kogge, Khoan T Truong, Dale A Rickard, Robert L Schoenike: Checkpoint retry mechanism. International Business Machines Corporation, John E Hoel, March 27, 1990: US04912707 (91 worldwide citation)

An improved checkpoint retry mechanism is disclosed which automatically updates checkpoint addresses to enable the retry of instruction sequences for shorter segments of recently executed code, in response to the detection of an error since the passage of the current checkpoint. It does this by upda ...


5
Howard T Olnowich, Thomas N Barker, Peter M Kogge, Gilbert C Vandling III: Dual priority switching apparatus for simplex networks. International Business Machines, Eugene I Shkurko, Lynn L Augspurger, August 22, 1995: US05444705 (39 worldwide citation)

A high priority path is added to the normal low priority path through a multi-stage switching network. The high priority path is established at the quickest possible speed because the high priority command is stored at the switch stage involved and made on a priority basis as soon as an output port ...


6
John D Bezek, Peter M Kogge: Inferencing production control computer system. International Business Machines, Eugene I Shkurko, Richard M Goldman, May 14, 1996: US05517642 (36 worldwide citation)

A computer system, and its parallel and serial implementations, its serial and parallel network and multi-processor configurations, with tight and loose coupling among processors. The computer system has a CAM coupled to the computer system or imbedded therein. CAM requests may be processed serially ...


7
Paul A Wilkinson, Peter M Kogge: Array processor dotted communication network based on H-DOTs. International Business Machines Corporation, Lynn L Augspurger, David V Rossi, May 13, 1997: US05630162 (33 worldwide citation)

A parallel processor array of the SIMD or MIMD type requires a highly organized communication network for communication between processing elements (PEs). For a communication network a dotted network structure is created which reduces the magnitude of the the networking implementation using a link w ...


8
John D Bezek, Peter M Kogge: Method for interfacing applications with a content addressable memory. International Business Machines Corporation, Arthur J Samodovitz, Whitham Curtis Whitham & McGinn, March 25, 1997: US05615360 (33 worldwide citation)

The computer system has its parallel and serial implementations, its serial and parallel network and multi-processor configurations, with tight and loose coupling among processors. The computer system has a CAM coupled to the computer system or imbedded therein. CAM requests may be processed seriall ...


9
Timothy B Brodnax, Bryan K Bullis, Steven A King, Peter M Kogge, Dale A Rickard: Data processing system having prediction by using an embedded guess bit of remapped and compressed opcodes. International Business Machines, Joseph C Redmond, Mark Wurm, October 31, 1995: US05463746 (23 worldwide citation)

A data processing system includes branch prediction apparatus for storing branch data in a branch prediction RAM after each branch has occurred. The RAM interfaces with branch logic means which tracks whether a branch is in progress and if a branch was guessed. An operational code compression means ...


10
John D Bezek, Peter M Kogge: Inferencing production control computer system. International Business Machines Corporation, Eugene I Shkurko, Richard M Goldman, March 25, 1997: US05615309 (16 worldwide citation)

A computer system, and its parallel and serial implementations, its serial and parallel network and multi-processor configurations, with tight and loose coupling among processors. The computer system has a CAM coupled to the computer system or imbedded therein. CAM requests may be processed serially ...