1
Daniel L Ellsworth, Paul A Sullivan: Method of fabricating a high density, low power, merged vertical fuse/bipolar transistor. NCR Corporation, J T Cavender, Casimer K Salys, March 24, 1987: US04651409 (114 worldwide citation)

A fuse programmable ROM includes a wafer for a CMOS-type structure having an emitter, which emitter is overlain by a fuse pad of an undoped polysilicon and a conductive layer. There is a layer of barrier oxide disposed on the conductive top layer of the fuse pad and a sidewall oxide surrounding the ...


2
Richard Alden DeFelice, Paul A Sullivan: Method and apparatus for securing electronic circuits. Lucent Technologies, Mayer Fortkort & Williams, July 2, 2002: US06414884 (67 worldwide citation)

A method and apparatus for protecting the stored information on an integrated circuit from being compromised through reverse engineering. To do so, the method and apparatus splits the functionality of an integrated circuit into two separate integrated circuits, which are then connected in an interlo ...


3
Salvador Duenas, Ratnaji Rao Kola, Henry Y Kumagai, Maureen Yee Lau, Paul A Sullivan, King Lien Tai: Thin film capacitors and process for making them. Lucent Technologies, Richard J Botos, June 13, 2000: US06075691 (62 worldwide citation)

A thin film capacitor for use in semiconductor integrated circuit devices such as analog circuits, rf circuits, and dynamic random access memories (DRAMs), and a method for its fabrication, is disclosed. The capacitor has a dielectric thickness less than about 50 nm, a capacitance density of at leas ...


4
Paul A Sullivan: Method of making CMOS by twin-tub process integrated with a vertical bipolar transistor. NCR Corporation, J T Cavender, Casimer K Salys, April 2, 1985: US04507847 (60 worldwide citation)

A process for forming high performance npn bipolar transistors in an enhanced CMOS process using only one additional mask level. The bipolar transistor is formed using a low dose blanket implant to form the base in the substrate n-well, then applying arsenic-implanted polysilicon to form the emitter ...


5
John H McCoy, Paul A Sullivan: Alignment system and method with micromovement stage. Hughes Aircraft Company, Lewis B Sternfels, W H MacAllister, W J Bethurum, April 19, 1977: US04019109 (60 worldwide citation)

Alignment of a mask and a semiconductor wafer to be processed is effected by orthogonal and angular movements of the mask singly and in combination. A carrier for the mask is supported on four orthogonally positioned transducers which, when actuated to elongate or contract, produce carrier translati ...


6
Paul A Sullivan, George J Collins: Process for fabricating a bipolar transistor with a thin base and an abrupt base-collector junction. NCR Corporation, J T Cavender, Casimer K Salys, June 18, 1985: US04523370 (47 worldwide citation)

A process for fabricating a bipolar transistor with a thin base and an abrupt base-collector junction includes the steps of depositing a thin layer of polycrystalline or amorphous silicon base material in a single crystal collector region, while in-situ doping the deposited silicon with boron atoms, ...


7
Richard Alden DeFelice, Eric William Dittmann, Paul A Sullivan: Flip chip assembly of semiconductor IC chips. Lucent Technologies, Peter V D Wilde, Thomas Kayden Horstemeyer & Risley, February 20, 2001: US06190940 (44 worldwide citation)

The specification describes techniques for soldering IC chips, or other components, to interconnection substrates using a patterned epoxy layer to define the solder interconnections. The epoxy layer is photodefined to form openings that expose the bonding sites on the IC chip (or alternatively the i ...


8
Werner A Metz Jr, Nicholas J Szluk, Gayle W Miller, Michael J Drury, Paul A Sullivan: Use of selectively deposited tungsten for contact formation and shunting metallization. NCR Corporation, Wilbert Hawk Jr, Casimer K Salys, March 10, 1987: US04648175 (36 worldwide citation)

A process for using selectively deposited tungsten in the making of ohmic contacts and contact/interconnect metallization patterns. In one form the process is employed to interconnect fully formed field effect devices using contacts through the dielectric layer. A thin layer of intrinsic polysilicon ...


9
John H McCoy, Paul A Sullivan: Hard X-ray and fluorescent X-ray detection of alignment marks for precision mask alignment. Hughes Aircraft Company, William J Bethurum, W H MacAllister, April 18, 1978: US04085329 (21 worldwide citation)

The specification describes a process wherein short wavelength or "hard" x-rays (less than about 4 Angstroms) are used to align a semiconductor processing mask with a semiconductor wafer without the requirement for thinning the wafer to permit the x-rays to pass through. These short wavelength x-ray ...


10
Robert L Seliger, Paul A Sullivan: Process for channeling ion beams. Hughes Aircraft Company, Mary E Lachman, W J Bethurum, W H MacAllister, June 12, 1979: US04158141 (14 worldwide citation)

The specification describes a process for minimizing ion scattering and thereby improving resolution in ion beam lithography. First, a substrate coated with a layer of ion beam resist is provided at a chosen spaced distance from an ion beam source. Next, a monocrystalline membrane with a patterned i ...