1
Mark M Leather, Anthony P DeLaurier, Patrick Y Law, Robert A Drebin, Howard Cheng, Robert Moore: Z-texturing. Nintendo, Nixon & Vanderhye P C, December 16, 2003: US06664958 (117 worldwide citation)

A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. The same texture mapping hardware used for color textu ...


2
Robert A Drebin, Timothy J Van Hook, Patrick Y Law, Mark M Leather, Matthew Komsthoeft: Recirculating shade tree blender for a graphics system. Nintendo, Nixon & Vanderhye PC, February 13, 2007: US07176919 (96 worldwide citation)

A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. A relatively low chip-footprint, versatile texture environment (TEV) processing subsystem is implemented in a pipelined graphics system circulates computed color and alpha data ...


3
Martin Hollis, Patrick Y Law: Method and apparatus for providing improved fog effects in a graphics system. Nintendo, Nixon & Vanderbye P C, June 17, 2003: US06580430 (95 worldwide citation)

A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. Improved fog simulation is provided by enabling backwa ...


4
Robert A Drebin, Timothy J Van Hook, Patrick Y Law, Mark M Leather, Matthew Komsthoeft: Recirculating shade tree blender for a graphics system. Nintendo, Nixon & Vanderhye P C, April 25, 2006: US07034828 (89 worldwide citation)

A hardware-accelerated recirculating programmable texture blender/shader arrangement circulates computed color and alpha data over multiple texture blending/shading cycles (stages) to provide multi-texturing and other effects. Up to sixteen independently programmable consecutive stages, forming a ch ...


5
Patrick Y Law: Method and apparatus for providing data to a parallel processing array. LSI Logic Corporation, B Noel Kivlin, Conley Rose & Tayon P C, June 10, 1997: US05638533 (40 worldwide citation)

A data register for providing data values to an n-element parallel processing array includes a memory buffer having first and second memory modules, where each module includes n columns of data values. An address decoder receives an address for accessing n data values at a time from the memory modul ...


6
Patrick Y Law, Yoshitaka Yasumoto: Method and apparatus for providing logical combination of N alpha operations within a graphics system. Nintendo, Nixon & Vanderhye P C, June 13, 2006: US07061502 (19 worldwide citation)

A graphics system including a custom graphics and audio processor produces exciting 2D and 3D graphics and surround sound. The system includes a graphics and audio processor including a 3D graphics pipeline and an audio digital signal processor. Logical combination of N alpha compares can be used to ...


7
Patrick Y Law: Method and apparatus for improved video filter processing using efficient pixel register and data organization. LSI Logic Corporation, B Noel Conley Rose & Tayon Kivlin, September 23, 1997: US05671020 (17 worldwide citation)

A data register for providing data values to an n-element parallel processing array includes a memory buffer having first and second memory modules, where each module includes n columns of data values. An address decoder receives an address for accessing n data values at a time from the memory modul ...


8
Patrick Y Law, Robert A Drebin, Keith Cox, James S Ismail: Power management for a graphics processing unit or other circuit. Apple, Lawrence J Merkel, Meyertons Hood Kivlin Kowert & Goetzel P C, December 30, 2014: US08924752 (16 worldwide citation)

In one embodiment, a system includes power management control that controls a duty cycle of a processor to manage power. The duty cycle may be the amount of time that the processor is powered on as a percentage of the total time. By frequently powering up and powering down the processor during a per ...


9
Patrick Y Law: Arbitration unit for memory system. Apple, September 10, 2013: US08533403 (14 worldwide citation)

Techniques are disclosed relating to maximizing utilization of memory systems within power constraints of the memory systems. In one embodiment, an integrated circuit may include multiple memory controllers and an arbitration unit. Each memory controller may be configured to generate requests to per ...


10
Mark Buer, Patrick Y Law, Zheng Qi: Authentication engine architecture and method. Broadcom Corporation, Sterne Kessler Goldstein & Fox PLLC, February 13, 2007: US07177421 (8 worldwide citation)

Provided is an architecture (hardware implementation) for an authentication engine to increase the speed at which multi-loop and/or multi-round authentication algorithms may be performed on data packets transmitted over a computer network. Authentication engines in accordance with the present invent ...