1
Mark A Gonzales, Thomas J Holman, Patrick F Stolt: Method and apparatus for automatically scrubbing ECC errors in memory via hardware. Intel Corporation, Blakely Sokoloff Taylor & Zafman, August 8, 2000: US06101614 (164 worldwide citation)

The present invention provides a method and apparatus for automatically scrubbing ECC errors in memory upon the detection of a correctable error in data read from memory. This is performed by providing in a memory controller memory control logic for controlling accesses to memory, an ECC error check ...


2
Patrick F Stolt, Thomas J Holman: Memory controller for independently supporting synchronous and asynchronous DRAM memories. Intel Corporation, Blakely Sokoloff Taylor & Zafman, February 24, 1998: US05721860 (40 worldwide citation)

The present invention provides a method and apparatus in a memory controller coupled between a system bus and memory for independently supporting one of a Synchronous DRAM (SDRAM) and an Asynchronous DRAM (ADRAM) memory type via common signal pins. According to the preferred embodiment, the memory c ...


3
Patrick F Stolt, Thomas J Holman: Memory controller for independently supporting Synchronous and Asynchronous DRAM memories. Intel Corporation, Blakely Sokoloff Taylor & Zafman, April 6, 1999: US05893136 (29 worldwide citation)

The present invention provides a method and apparatus in a memory controller coupled between a system bus and memory for independently supporting one of a Synchronous DRAM (SDRAM) and an Asynchronous DRAM (ADRAM) memory type via common signal pins. According to the preferred embodiment, the memory c ...


4
Stephen S Pawlowski, Patrick F Stolt: Method and apparatus for controlling data transfers between a bus and a memory device using a multi-chip memory controller. Intel Corporation, Blakely Sokoloff Taylor & Zafman, September 22, 1998: US05812803 (15 worldwide citation)

A method and apparatus for controlling data transfers between a bus and a memory device using a multi-chip memory controller includes a memory controller having a data controller unit and a data path unit. Signals are passed between the data controller unit and the data path unit, thereby providing ...


5
Patrick F Stolt, Stephen S Pawlowski: Memory system including a memory controller having a data strobe generator and method for accesing a memory using a data storage. Intel Corporation, Kenyon & Kenyon, April 29, 2003: US06557071 (5 worldwide citation)

A memory subsystem for a computer system includes a memory controller that has a data strobe generator. The memory subsystem further includes a Dynamic Random Access Memory (“DRAM”) array coupled to the memory controller and a data path coupled to the data strobe generator and the DRAM array. The DR ...


6
Patrick F Stolt: Apparatus and method for an interface architecture for flexible and extensible media processing. Intel Corporation, Blakely Sokoloff Taylor & Zafman, June 11, 2013: US08462164

A method and apparatus for an interface architecture for flexible and extensible media processing. In one embodiment, the apparatus may include on-chip interconnection logic, such as, for example, a crossbar. The apparatus, which in one embodiment is a chipset, may include at least one on-chip, func ...


7
Patrick F Stolt, Stephen S Pawlowski: Data strobe for faster data access from a memory array. Kenyon & Kenyon, August 2, 2001: US20010011322-A1

A memory subsystem for a computer system includes a memory controller that has a data strobe generator. The memory subsystem further includes a DRAM array coupled to the memory controller and a data path coupled to the data strobe generator and the DRAM array. The DRAM array is separated into two DR ...


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Patrick F Stolt: Apparatus and method for an interface architecture for flexible and extensible media processing. Blakely Sokoloff Taylor & Zafman, May 31, 2007: US20070120859-A1

A method and apparatus for an interface architecture for flexible and extensible media processing. In one embodiment, the apparatus may include on-chip interconnection logic, such as, for example, a crossbar. The apparatus, which in one embodiment is a chipset, may include at least one on-chip, func ...


10
Robert W Cone, Patrick F Stolt: Network interface application specific integrated circuit to allow direct attachment for an appliance,such as a printer device. Dennis M de Guzman, Blakely Sokoloff Taylor & Zafman, June 20, 2002: US20020078118-A1

An application specific integrated circuit (ASIC) allows an appliance, such as a printer device, to be directly attached to a network. The ASIC includes state machines and on-chip storage buffers that perform functions typically performed by processors, memory, and embedded internal software. The st ...