1
Patrick A Curran: Process for making a buried conductor by fusing two wafers. Texas Instruments Incorporated, Gary C Honeycutt, Rhys Merrett, Melvin Sharp, November 10, 1987: US04704785 (115 worldwide citation)

A process, and product made thereby, for bonding two wafers together to form a single wafer with a continuous interface, and for selectively burying a low impedance conductor in the wafer, by providing host and guest wafers having substantially the same crystal orientation and periodicity. A crystal ...


2
Patrick A Curran: Method of making a heterojunction bipolar transistor with SIPOS. Texas Instruments Incorporated, Gary C Honeycutt, N Rhys Merrett, Mel Sharp, January 5, 1988: US04717681 (105 worldwide citation)

A wafer process flow encompasses an arbitray repeated layered structure of heteroepitaxial layers of silicon based films with process control throughout the strata of chemical potential and recombination velocity, suitable for both high performance MOS and bipolar transistors with three dimensional ...


3
Patrick A Curran: Monolithic integration of logic, control and high voltage interface circuitry. Texas Instruments Incorporated, Douglas A Lashmit, N Rhys Merrett, Melvin Sharp, September 13, 1983: US04403395 (74 worldwide citation)

Monolithic integration of digital logic circuitry, precision control circuitry, and high voltage interface circuits on the same semiconductor chip is achieved, using various combinations selected from D-MOS, vertical NPN, lateral NPN, PNP, P-MOS, N-MOS, and J-FET components. Cathode driver circuits ...


4
Patrick A Curran: Process for monolithic integration of logic, control, and high voltage interface circuitry. Texas Instruments Incorporated, Gary C Honeycutt, James T Comfort, Rene E Grossman, April 20, 1982: US04325180 (48 worldwide citation)

Monolithic integration of digital logic circuitry, precision control circuitry, and high voltage interface circuits on the same semiconductor chip is achieved, including various combinations selected from D-MOS, vertical NPN, lateral NPN, PNP, P-MOS, N-MOS, and J-FET components. Cathode driver circu ...


5
Patrick A Curran, Susan R Wilson: Multilayer semi-insulating film for hermetic wafer passivation and method for making same. Texas Instruments Incorporated, Gary C Honeycutt, Melvin Sharp, N Rhys Merrett, February 13, 1990: US04901133 (43 worldwide citation)

A film for hermetically passivating monocrystalline silicon includes sequential layers of undoped amorphous silicon, oxygen doped polycrystalline silicon, silicon rich oxynitride, and silicon nitride, and may be overlaid with an organic bulk dielectric such as polyimide. The inorganic film accuratel ...


6
Patrick A Curran: Process of making a double heterojunction 3-D I.sup.2 L bipolar transistor with a Si/Ge superlattice. Texas Instruments Incorporated, Gary C Honeycutt, Melvin Sharp, Rhys Merrett, September 13, 1988: US04771013 (36 worldwide citation)

A three dimensional, bipolar wafer process for integrating high voltage, high power, analog, and digital circuitry, and structure formed thereby includes a wafer of non-compensated epitaxial strata on a heavily donor doped monocrystalline silicon substrate of crystal orientation, which is etched and ...


7
Patrick A Curran: Monolithic integration of logic, control and high voltage interface circuitry. Texas Instruments Incorporated, Richard A Bachand, N Rhys Merrett, Melvin Sharp, October 8, 1985: US04546370 (34 worldwide citation)

Monolithic integration of digital logic circuitry, precision control circuitry, and high voltage interface circuits on the same semiconductor chip is achieved, using various combinations selected from D-MOS, vertical NPN, lateral NPN, PNP, P-MOS, N-MOS, and J-FET components. Cathode driver circuits ...


8
Saw T Ang, Patrick A Curran: Passivated dual dielectric gate system and method for fabricating same. Texas Instruments Incorporated, Gary C Honeycutt, N Rhy Merrett, Melvin Sharp, November 17, 1987: US04707721 (26 worldwide citation)

A passivated dual dielectric gate system compatible with low temperature processing utilizes a dual dielectric system with a silicon dioxide dielectric film or layer at the monocrystalline substrate surface, or termination. The dual dielectric system includes a dielectric film at the substrate surfa ...


9
Patrick A Curran: Composition double heterojunction transistor. Texas Instruments Incorporated, Gary C Honeycutt, Melvin Sharp, N Rhys Merrett, September 13, 1988: US04771326 (18 worldwide citation)

A heterojunction transistor has an acceptor doped superlattice base of sub-micron thickness, a composite emitter with a donor concentration adjacent the base, with a wider bandgap energy than the base, and with a low recombination velocity to minimize minority carrier diffusion and to set the diverg ...


10
Patrick A Curran: Method of inductively contacting semiconductor regions. John G Mills, June 30, 1992: US05126284 (15 worldwide citation)

A semiconductor contact system is formed by inductively coupling an ohmic electrode, such as a metal, to a semiconductor region by means of an intervening diamagnetic boride glass, which necessarily constrains most electric current to prevail along the uniaxial normal to the semiconductor contact. T ...