1
Yen Yi Wu, Wei Yueh Sung, Pao Huei Chang Chien, Chi Chih Chu, Cheng Yin Lee, Gwo Liang Weng: Method of making a semiconductor package and method of making a semiconductor device. Advanced Semiconductor Engineering, Cooley Godward Kronish, January 5, 2010: US07642133 (104 worldwide citation)

The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electri ...


2
Pao Huei Chang Chien, Ping Cheng Hu, Po Shing Chiang, Wei Lun Cheng: Advanced quad flat non-leaded package structure and manufacturing method thereof. Advanced Semiconductor Engineering, Foley & Lardner, August 7, 2012: US08237250 (10 worldwide citation)

The advanced quad flat non-leaded package structure includes a carrier, a chip, a plurality of wires, and a molding compound. The carrier includes a die pad and a plurality of leads. The leads include first leads disposed around the die pad, second leads disposed around the first leads and at least ...


3
Pao Huei Chang Chien, Ping Cheng Hu, Po Shing Chiang, Wei Lun Cheng: Manufacturing method of advanced quad flat non-leaded package. Advanced Semiconductor Engineering, Cooley, February 28, 2012: US08124447 (8 worldwide citation)

The manufacturing method of advanced quad flat non-leaded packages includes performing a pre-cutting process prior to the backside etching process for defining the contact terminals. The pre-cutting process ensures the isolation of individual contact terminals and improves the package reliability.


4
Pao Huei Chang Chien, Ping Cheng Hu, Chien Wen Chen: Advanced quad flat no lead chip package having marking and corner lead features and manufacturing methods thereof. Advanced Semiconductor Engineering, Cooley, February 21, 2012: US08120152 (8 worldwide citation)

A semiconductor package and related methods are described. In one embodiment, the package includes a die pad, a first plurality of leads disposed in a lead placement area around the die pad, a second plurality of leads disposed in corner regions of the lead placement area, a semiconductor chip on th ...


5
Pao Huei Chang Chien, Ping Cheng Hu, Chien Wen Chen, Hsu Yang Lee: Semiconductor package having a cavity structure. Advanced Semiconductor Engineering, Foley & Lardner, July 23, 2013: US08492883 (6 worldwide citation)

A semiconductor package and related methods are described. In one embodiment, the package includes a die pad, a plurality of leads, a chip, and a package body. The die pad includes: (1) a peripheral edge region defining, a cavity with a cavity bottom including a central portion; (2) an upper sloped ...


6
Pao Huei Chang Chien, Ping Cheng Hu, Po Shing Chiang, Wei Lun Cheng: Semiconductor package and manufacturing method thereof. Advanced Semiconductor Engineering, Cooley, January 31, 2012: US08106492 (5 worldwide citation)

The advanced quad flat non-leaded package structure includes a carrier having a die pad and a plurality of leads, at least a chip, a plurality of wires, and a molding compound. The rough surface of the carrier enhances the adhesion between the carrier and the surrounding molding compound.


7
Chien Wen Chen, Yi Shao Lai, Hsiao Chuan Chang, Tsung Yueh Tsai, Pao Huei Chang Chien, Ping Cheng Hu, Hsu Yang Lee: Advanced quad flat no lead chip package having a protective layer to enhance surface mounting and manufacturing methods thereof. Advanced Semiconductor Engineering, Cooley, February 14, 2012: US08115285 (3 worldwide citation)

A semiconductor package and related methods are described. In one embodiment, the package includes a die pad, multiple leads, a chip, a package body, and a protective layer. The die pad includes an upper sloped portion, a lower sloped portion, and a peripheral edge region defining a cavity with a ca ...


8
Yen Yi Wu, Pao Huei Chang Chien, Wei Yueh Sung: Stackable semiconductor package and the method for making the same. Advanced Semiconductor Engineering, Volentine & Whitt Pllc, July 10, 2008: US20080164595-A1

The present invention relates to a stackable semiconductor package and the method for making the same. The stackable semiconductor package comprises a first substrate, a semiconductor device, a plurality of stud bumps, a plurality of first wires, a second substrate, and a molding compound. The semic ...


9
Yen Yi Wu, Wei Yueh Sung, Pao Huei Chang Chien, Chi Chih Chu, Cheng Yin Lee, Gwo Liang Weng: Semiconductor package and semiconductor device. North America Intellectual Property Corporation, March 27, 2008: US20080073769-A1

The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electri ...


10
Yen Yi Wu, Wei Yueh Sung, Pao Huei Chang Chien, Chi Chih Chu, Cheng Yin Lee, Gwo Liang Weng: Method of making a semiconductor package and method of making a semiconductor device. North America Intellectual Property Corporation, March 27, 2008: US20080076208-A1

The present invention relates to a semiconductor package and a semiconductor device and a method of making the same. The method of making the semiconductor package comprises: providing a substrate; attaching a chip to a surface of the substrate; forming a plurality of connecting elements for electri ...