1
Nobuo Hayasaka, Katsuya Okumura, Keiichi Sasaki, Mie Matsuo: Multichip semiconductor device, chip therefor and method of formation thereof. Kabushiki Kaisha Toshiba, Finnegan Henderson Farabow Garrett & Dunner L, October 26, 2004: US06809421 (242 worldwide citation)

A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal ...


2
Yukio Nishiyama, Rempei Nakata, Nobuo Hayasaka, Haruo Okano, Riichirou Aoki, Takahito Nagamatsu, Akemi Satoh, Masao Toyosaki, Hitoshi Ito: Method of manufacturing silicon oxide film containing fluorine. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt, July 4, 1995: US05429995 (237 worldwide citation)

Disclosed is a method of manufacturing a semiconductor device, in which a silicon oxide film containing fluorine, said film exhibiting a low dielectric constant and a low hygroscopicity and acting as an insulating film for electrically isolating wirings included in a semiconductor device, is formed ...


3
Hirotaka Nishino, Nobuo Hayasaka, Haruo Okano: Method of oxide etching with condensed plasma reaction product. Kabushiki Kaisha Toshiba, Foley & Lardner, July 9, 1991: US05030319 (216 worldwide citation)

Oxide material, on a substrate, in a reactor, is etched by dissolving a hydrogen halide reaction product in a liquid phase reaction product. Both the hydrogen halide and liquid phase reaction products are produced through a chemical reaction of a reactive gas containing hydrogen and halogen elements ...


4
Yasutaka Sasaki, Nobuo Hayasaka, Hisashi Kaneko, Hideaki Hirabayashi, Masatoshi Higuchi: Polishing agent and polishing method using the same. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, June 23, 1998: US05770095 (150 worldwide citation)

The present invention provides a polishing method including the steps of forming a film made of material containing a metal as a main component over a substrate having depressed portions on a surface thereof so as to fill the depressed portions with the film, and polishing the film by a chemical mec ...


5
Noriaki Matsunaga, Hideki Shibata, Nobuo Hayasaka: Method for fabricating a probe pin for testing electrical characteristics of an apparatus. Kabushiki Kaisha Toshiba, Pillsbury Winthrop Shaw Pittman, April 25, 2006: US07032307 (93 worldwide citation)

A probe pin for testing electric characteristics of a semiconductor device comprises a silicon pin core (3, 23, 33), and a conductive film (4, 24, 34) covering the entire surface, including the bottom face, of the pin core. The bottom face of the probe pin is connected directly to an electrode (7, 3 ...


6
Koji Sakui, Junichi Miyamoto, Nobuo Hayasaka, Katsuya Okumura: Multichip semiconductor device and memory card. Kabushiki Kaisha Toshiba, Banner & Witcoff, May 29, 2001: US06239495 (86 worldwide citation)

A multichip semiconductor device comprises a plurality of semiconductor chips, each including elements integrated in a semiconductor substrate. The semiconductor chips have substantially the same structure. Each semiconductor chip includes a connecting plug inserted in a through hole made through th ...


7
Junji Kunisawa, Mitsuko Odagaki, Natsuki Makino, Koji Mishima, Kenji Nakamura, Hiroaki Inoue, Norio Kimura, Tetsuo Matsuda, Hisashi Kaneko, Nobuo Hayasaka, Katsuya Okumura, Manabu Tsujimura, Toshiyuki Morita: Plating apparatus. Ebara Corporation, Kabushiki Kaisha Toshiba, Wenderoth Lind & Ponack L, October 14, 2003: US06632335 (59 worldwide citation)

A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion


8
Yasutaka Sasaki, Mie Matsuo, Rempei Nakata, Junichi Wada, Nobuo Hayasaka, Hiroyuki Yano, Haruo Okano: Polishing method and polishing apparatus. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, March 4, 1997: US05607718 (57 worldwide citation)

This invention provides a polishing method including the steps of forming a film to be polished on a substrate having a recessed portion in its surface so as to fill at least the recessed portion, and selectively leaving the film to be polished behind in the recessed portion by polishing the film by ...


9
Mie Matsuo, Haruo Okano, Nobuo Hayasaka, Kyoichi Suguro, Hideshi Miyajima, Jun ichi Wada: Semiconductor device having a metal film formed in a groove in an insulating film. Kabushiki Kaisha Toshiba, Oblon Spivak McClelland Maier & Neustadt P C, March 24, 1998: US05731634 (53 worldwide citation)

The present invention provides a method of manufacturing a semiconductor device, including the steps of forming a metal oxide film made of a metal oxide having a decrease in standard free energy smaller than a decrease in standard free energy of hydrogen oxide or of carbon oxide, on an insulating fi ...


10
Hiroyuki Yano, Gaku Minamihaba, Yukiteru Matsui, Nobuo Hayasaka, Katsuya Okumura, Akira Iio, Masayuki Hattori, Masayuki Motonari: Chemical mechanical method of polishing wafer surfaces. Kabushiki Kaisha Toshiba, JSR Corporation, Oblon Spivak McClelland Maier & Neustadt P C, April 23, 2002: US06375545 (47 worldwide citation)

It is an object of the present invention to provide an aqueous dispersion and CMP slurry that can achieve polishing at an adequate rate without producing scratches in the polishing surfaces of wafer working films, and a polishing process for wafer surfaces and a process for manufacture of a semicond ...