1
Daniel P Drogichen, Andrew J McCrocklin, Nicholas E Aneshansley: Multiprocessor computer having configurable hardware system domains. Sun Microsystems, Schwegman Lundberg Woessner & Kluth P A, August 3, 1999: US05931938 (57 worldwide citation)

Global address and data routers interconnect individual system units each having its own processors, memory, and I/O. A domain filter coupled to the routers dynamically defines groups of system units as domains and clusters of domains which have both software and hardware isolation from each other. ...


2
Andrew J McCrocklin, Nicholas E Aneshansley, Patricia Shanahan, James J Whelan, Jeffrey P Anderson, James E Kocol, Gary L Riddle: Direct-execution microprogrammable microprocessor system. Celerity Computing, Lyon & Lyon, August 2, 1988: US04761733 (46 worldwide citation)

A direct-execution microprogrammable microprocessor system uses an emulatory microprogrammable microprocessor for direct execution of microinstructions in main memory through a microinstruction port. A microinstruction cache with a microinstruction address extension unit serving to communicate micro ...


3
Michael V Konshak, Guoping Xu, Nicholas E Aneshansley: Thermal transfer technique using heat pipes with integral rack rails. Sun Microsystems, Osha • Liang, December 1, 2009: US07626820 (39 worldwide citation)

A thermal transfer apparatus for cooling a heat-producing electronic component includes an evaporator disposed over the heat-producing electronic component and thermally coupled to the heat-producing electronic component, a plurality of heat pipes carrying a working fluid therein disposed over the e ...


4
George C Lockwood, Nicholas E Aneshansley: Alterable capacitor memory array. NCR Corporation, J T Cavender, Lowell C Bergstedt, June 6, 1978: US04094008 (33 worldwide citation)

A novel memory array is disclosed, the array utilizing a matrix of variable threshold insulated gate field effect transistor cells. The cells are comprised solely of a gate region, having nitride and oxide layers, and a source region with the output data sensed, at the source, as a change of source ...


5
Nicholas E Aneshansley: Electrically alterable memory cell. NCR Corporation, J T Cavender, September 23, 1980: US04224686 (10 worldwide citation)

An electrically alterable memory cell is described which has a capacitive imbalance for causing the memory cell to assume either of its two stable states, and which uses a capacitor as a non-volatile storage element for retaining the information stored in the memory cell during power down operation. ...


6
Nicholas E Aneshansley: Digital second-order clock linearizer. Instrulab Incorporated, Jacox & Meckstroth, June 21, 1977: US04031530 (6 worldwide citation)

In order to obtain a very close fit to the characteristic curve of a non-linear sensor, such as a thermocouple, a linearized clock is developed and used to increment a counter during a time period representative of the sensor output. The linearized clock is obtained by passing a precision clock sign ...


7
Patricia Shanahan, Andrew E Phelps, Nicholas E Aneshansley: Victim invalidation. Sun Microsystems, Meyertons Hood Kivlin Kowert & Goetzel P C, B Noël Kivlin, November 1, 2005: US06961827 (5 worldwide citation)

The present invention provides a method and apparatus for invalidating a victimized entry. The apparatus comprises a directory cache adapted to store one or more cache entries, and a control unit. The control unit is adapted to determine whether it is desirable to remove a shared cache entry from th ...


8
Thomas M Wicki, Stephen E Phillips, Nicholas E Aneshansley, Ramaswamy Sivaramakrishnan, Paul N Loewenstein: Distributed cache coherency directory with failure redundancy. Oracle International Corporation, Meyertons Hood Kivlin Kowert & Goetzel, Erik A Heter, September 15, 2015: US09135175

A system includes a number of processors with each processor including a cache memory. The system also includes a number of directory controllers coupled to the processors. Each directory controller may be configured to administer a corresponding cache coherency directory. Each cache coherency direc ...


9
Daniel P Drogichen, Andrew J McCrocklin, Nicholas E Aneshansley: Multiprocessor computer having configurable hardware system domains. Sun Microsystems, Meyertons Hood Kivlin Kowert & Goetzel P C, April 27, 2010: USRE041293

Global address and data routers interconnect individual system units each having its own processors, memory, and I/O. A domain filter coupled to the routers dynamically defines groups of system units as domains and clusters of domains which have both software and hardware isolation from each other. ...


10
Guoping Xu, Gary L Gilbert, Nicholas E Aneshansley: Techniques for cooling electronic equipment. Sun Microsystems, Osha Liang Sun, January 25, 2007: US20070019391-A1

Electronic equipment housed in a cabinet is cooled using air that flows from one of a right side and a left side of the electronic equipment to the other one of the right side and the left side of the electronic equipment. The air is cooled using a heat exchanger that uses water or a refrigerant sup ...