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Woo Christy, Besser Paul R, Ngo Minh Van, Pan Janes N, Yin Jinsong: A method of forming a metal gate structure with tuning of work function by silicon incorporation. Advanced Micro Devices, Woo Christy, Besser Paul R, Ngo Minh Van, Pan Janes N, Yin Jinsong, sCOLLOPY Daniel R, November 4, 2004: WO/2004/095556 (28 worldwide citation)

A method for forming a semiconductor structure having a metal gate (30) with a controlled work function includes the step of forming a precursor having a substrate (10) with active regions (12) separated by a channel, a temporary gate (16) over the channel and within a dielectric layer (20). The tem ...


2
Paton Eric N, Xiang Qi, Besser Paul R, Lin Ming Ren, Ngo Minh Van, Wang Haihong: Mosfets incorporating nickel germanosilicided gate and methods of their formation. Advanced Micro Devices, sCOLLOPY Daniel R, May 6, 2004: WO/2004/038807 (17 worldwide citation)

A MOSFET gate or a MOSFET source or drain region comprises silicon germanium or polycrystalline silicon germanium. Silicidation with nickel is performed to form a nickel germanosilicide (62, 64) that preferably comprises the monosilicide phase of nickel silicide. The inclusion of germanium in the si ...


3
Wang Haihong, Besser Paul R, Goo Jung Suk, Ngo Minh Van, Paton Eric N, Xiang Qi: Method of forming a thick strained silicon layer and semiconductor structures incorporating a thick strained silicon layer. Advanced Micro Devices, COLLOPY Daniel R, July 22, 2004: WO/2004/061920 (4 worldwide citation)

A strained silicon layer (50) s grown on a layer of silicon germanium (40) and a layer of silicon germanium (52) is grown on the strained silicon (50) in a single continuous in situ deposition process with the strained silicon (50). Shallow trench isolations (48) are formed in the lower layer of sil ...


4
Ngo Minh Van, Besser Paul R, Lin Ming Ren, Wang Haihong: Mosfet device with tensile strained substrate and method of making the same. Advanced Micro Devices, Ngo Minh Van, Besser Paul R, Lin Ming Ren, Wang Haihong, sCOLLOPY Daniel R, August 12, 2004: WO/2004/068586 (2 worldwide citation)

An exemplary embodiment relates to a method for forming a metal oxide semiconductor field effect transistor (MOSFET). The method includes providing a substrate (40) having a gate (54) formed above the substrate (40) and performing at least one of the following depositing steps: depositing a spacer l ...


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Paton Eric N, Adem Ercan, Bertrand Jacques J, Besser Paul R, Buynoski Matthew S, Foster John Clayton, King Paul L, Kluth George Jonathan, Ngo Minh Van, Woo Christy Mei Chu: Method of forming nickel silicide using a one-step rapid thermal anneal process and backend processing. Advanced Micro Devices, December 31, 2003: GB2390224-A (1 worldwide citation)

A self-aligned silicide process that can accommodate a low thermal budget and form silicide regions (64, 66) of small dimensions in a controlled reaction. In a first temperature treatment, nickel metal or nickel alloy (52) is reacted with a silicon material (46) to form at least one high resistance ...


6
Ngo Minh Van, Hopper Dawn M, Huertas Robert A: Low temperature hillock suppression method in integrated circuit interconnects. Advanced Micro Devices, December 21, 2002: TW515045 (1 worldwide citation)

An integrated circuit and manufacturing method therefor is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer [216] is formed on the semiconductor substrate, and a channel dielectric layer [208] formed on the device dielectric layer has an opening formed ...


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Ngo Minh Van, Ramsbey Mark T, Kamal Tazrien, Gao Pei Yuan: Pecvd silicon-rich oxide layer for reduced uv charging in an eeprom. Advanced Micro Devices, Ngo Minh Van, Ramsbey Mark T, Kamal Tazrien, Gao Pei Yuan, sCOLLOPY Daniel R, February 3, 2005: WO/2005/010984 (1 worldwide citation)

A Si-rich silicon oxide layer (500) having reduced UV transmission is deposited by PECVD, on an interlayer dielectric (300) , prior to metallization, thereby reducing Vt. Embodiments include depositing a UV opaque Si-rich silicon oxide layer (500) having a refractive index (R.I.) of 1.7 to 2.0. The ...


9
Woo Christy Mei Chu, Besser Paul R, Ngo Minh Van, Pan Janes N, Yin Jinsong: A method of forming a metal gate structure with tuning of work function by silicon incorporation. Advanced Micro Devices, February 15, 2006: GB2417137-A

A method for forming a semiconductor structure having a metal gate (30) with a controlled work function includes the step of forming a precursor having a substrate (10) with active regions (12) separated by a channel, a temporary gate (16) over the channel and within a dielectric layer (20). The tem ...


10
Tripsas Nicholas, Buynoski Matthew S, Pangrle Suzette, Okoroanyanwu Uzodinma, Hui Angela T, Lyons Christopher F, Subramanian Ramkumar, Lopatin Sergey D, Ngo Minh Van, Khathuria Ashok M, Chang Mark S, Cheung Patrick K, Oglesby Jane V: Polymer memory device formed in via opening. Advanced Micro Devices, April 19, 2006: GB2419231-A

One aspect of the present invention relates to a method of fabricating a polymer memory device in a via. The method involves providing a semiconductor substrate having at least one metal-containing layer thereon, forming at least one copper contact in the metal-containing layer, forming at least one ...



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