1
Fred Gruner, David Hass, Ramesh Panwar, Nazar Zaidi: Sharing a second tier cache memory in a multi-processor. Juniper Networks, Shumaker & Sieffert PA, April 12, 2005: US06880049 (107 worldwide citation)

A set of cache memory includes a set of first tier cache memory and a second tier cache memory. In the set of first tier cache memory each first tier cache memory is coupled to a compute engine in a set of compute engines. The second tier cache memory is coupled to each first tier cache memory in th ...


2
Abbas Rashid, Nazar Zaidi: Cross-bar switch employing a multiple entry point FIFO. Juniper Networks, Shumaker & Sieffert P A, February 27, 2007: US07184446 (93 worldwide citation)

A cross-bar switch includes a set of input ports for receiving data packets and a set of sink ports coupled to the input ports to accept and forward the data packets. Each sink port includes a multiple entry point FIFO with multiple data inputs for receiving data packets. In one implementation, the ...


3
Mark Bryers, Elango Ganesan, Frederick Gruner, David Hass, Robert Hathaway, Ramesh Panwar, Ricardo Ramirez, Abbas Rashid, Mark Vilas, Nazar Zaidi, Yen Lee, Chau Anh Ngoc Nguyen, John Phillips, Yuhong Andy Zhou, Gregory G Spurrier, Sankar Ramanoorthi, Michael Freed: Content service aggregation system. Juniper Networks, Shumaker & Sieffert P A, December 4, 2007: US07305492 (77 worldwide citation)

A network content service apparatus includes a set of compute elements adapted to perform a set of network services; and a switching fabric coupling compute elements in said set of compute elements. The set of network services includes firewall protection, Network Address Translation, Internet Proto ...


4
Mark Bryers, Elango Ganesan, Frederick Gruner, David Hass, Robert Hathaway, Ramesh Panwar, Ricardo Ramirez, Abbas Rashid, Mark Vilas, Nazar Zaidi, Yen Lee, Chau Ahn Ngoc Nguyen, John Phillips, Yuhong Andy Zhou, Gregory G Spurrier, Sankar Ramanoorthi, Michael Freed: Content service aggregation system. Juniper Networks, Shumaker & Sieffert P A, July 27, 2010: US07765328 (63 worldwide citation)

A network content service apparatus includes a set of compute elements adapted to perform a set of network services; and a switching fabric coupling compute elements in said set of compute elements. The set of network services includes firewall protection, Network Address Translation, Internet Proto ...


5
Nazar Zaidi, Gary Hammond, Ken Shoemaker: Method and apparatus for scheduling instructions in waves. Intel Corporation, Blakely Sokoloff Taylor & Zafman, January 18, 2000: US06016540 (51 worldwide citation)

In a microprocessor, an Instruction scheduler 30 includes a dependency matrix 36 and a waiting buffer 34. A dependency determination unit 32 receives instructions to be executed, forwards the instructions to the waiting buffer 34, determines if any dependency exists between the instructions, and for ...


6
Nazar Zaidi, Gary Hammond, Ken Shoemaker, Jeff Baxter: Dependency matrix. Intel Corporation, Charles A Mirho, May 16, 2000: US06065105 (49 worldwide citation)

In a microprocessor, an instruction scheduler 30 includes a dependency matrix 36 and a waiting buffer 34. A dependency determination unit 32 receives instructions to be executed, forwards the instructions to the waiting buffer 34, determines if any dependency exists between the instructions, and for ...


7
Elango Ganesan, Ramesh Panwar, Yen Lee, Chau Anh Ngoc Nguyen, John Phillips, Yuhong Andy Zhou, Gregory G Spurrier, Sankar Ramanoorthi, Michael Freed, Mark Bryers, Nazar Zaidi: Content service aggregation device for a data center. Juniper Networks, Shumaker & Sieffert P A, April 22, 2008: US07363353 (39 worldwide citation)

An architecture for controlling a multiprocessing system to provide at least one network service to subscriber data packets transmitted in the system using a plurality of compute elements, comprising a management compute element including service set-up information for at least one service and at le ...


8
David Hass, Frederick Gruner, Nazar Zaidi, Ramesh Panwar, Mark Vilas: Ring-based memory requests in a shared memory multi-processor. Juniper Networks, Shumaker & Sieffert PA, May 17, 2005: US06895477 (25 worldwide citation)

A system includes a plurality of processing clusters and a snoop controller adapted to service memory requests. The snoop controller and each processing cluster are coupled to a snoop ring. A first processing cluster forwards a memory request to the snoop controller for access to a memory location. ...


9
Fred Gruner, David Hass, Robert Hathaway, Ramesh Panwar, Ricardo Ramirez, Nazar Zaidi: Managing ownership of a full cache line using a store-create operation. Juniper Networks, Shumaker & Sieffert P A, May 31, 2005: US06901482 (24 worldwide citation)

A system includes a plurality of processing clusters and a snoop controller. A first processing cluster in the plurality of processing clusters includes a first tier cache memory coupled to a second tier cache memory. The system employs a store-create operation to obtain sole ownership of a full cac ...


10
Nazar Zaidi: Expanding microcode associated with full and partial width macroinstructions. Intel Corporation, Blakely Sokoloff Taylor & Zafman, June 17, 2003: US06581154 (22 worldwide citation)

A microarchitecture for dynamically expanding and executing microcode routines is provided. According to one aspect of the present invention, a mechanism expands a generic instruction into specific instructions at run-time, which may be employed to execute a computer program. These generic instructi ...